Patents by Inventor Mario J. Di Cino

Mario J. Di Cino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit, construction of integrated circuitry, and method of forming an array
    Patent number: 11355348
    Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: June 7, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Gurpreet Lugani, Kyle B. Campbell, Mario J. Di Cino, Aaron W. Freese, Alex Kogan, Kevin R. Shea
  • Determining overlay of features of a memory array
    Patent number: 11094643
    Abstract: Methods, apparatuses, and systems related to determining overlay of features of a memory array are described. An example method includes forming a plurality of contacts on a working surface and selectively forming a first portion of a layer of conductive lines and a second portion of the layer of conductive lines in contact with the contacts. The first portion of the layer of conductive lines formed over the working surface is separated from the second portion of the layer of conductive lines formed over the working surface by a gap. The method includes determining an overlay of at least one of the contacts formed over the working surface in the gap relative to one of the conductive lines formed over the working surface.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: August 17, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Kendall Smith, Kari McLaughlin, Mario J. Di Cino, Xue Chen, Lane A. Gray, Joseph G. Lindsey
  • DETERMINING OVERLAY OF FEATURES OF A MEMORY ARRAY
    Publication number: 20200321283
    Abstract: Methods, apparatuses, and systems related to determining overlay of features of a memory array are described. An example method includes forming a plurality of contacts on a working surface and selectively forming a first portion of a layer of conductive lines and a second portion of the layer of conductive lines in contact with the contacts. The first portion of the layer of conductive lines formed over the working surface is separated from the second portion of the layer of conductive lines formed over the working surface by a gap. The method includes determining an overlay of at least one of the contacts formed over the working surface in the gap relative to one of the conductive lines formed over the working surface.
    Type: Application
    Filed: April 2, 2019
    Publication date: October 8, 2020
    Inventors: Kendall Smith, Kari McLaughlin, Mario J. Di Cino, Xue Chen, Lane A. Gray, Joseph G. Lindsey
  • Integrated Circuit, Construction of Integrated Circuitry, and Method of Forming an Array
    Publication number: 20200266071
    Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.
    Type: Application
    Filed: April 14, 2020
    Publication date: August 20, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Gurpreet Lugani, Kyle B. Campbell, Mario J. Di Cino, Aaron W. Freese, Alex Kogan, Kevin R. Shea
  • Integrated circuit, construction of integrated circuitry, and method of forming an array
    Patent number: 10692727
    Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: June 23, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Gurpreet Lugani, Kyle B. Campbell, Mario J. Di Cino, Aaron W. Freese, Alex Kogan, Kevin R. Shea
  • Integrated Circuit, Construction Of Integrated Circuitry, And Method Of Forming An Array
    Publication number: 20200035498
    Abstract: A method of forming an array comprising using two different composition masking materials in forming a pattern of spaced repeating first features of substantially same size and substantially same shape relative one another. A pattern-interrupting second feature of at least one of different size or different shape compared to that of the first features is within and interrupts the pattern of first features. The pattern of the first features with the pattern-interrupting second feature are translated into lower substrate material that is below the first features and the pattern-interrupting second feature. Material of the first features and of the pattern-interrupting second feature that is above the lower substrate material is removed at least one of during or after the translating.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 30, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Gurpreet Lugani, Kyle B. Campbell, Mario J. Di Cino, Aaron W. Freese, Alex Kogan, Kevin R. Shea