Patents by Inventor Mario Troiani

Mario Troiani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190394022
    Abstract: Techniques for securing communication. The techniques include using at least one device to perform method for encrypting input data using a cipher associated with a plurality of languages including a first language, the first language associated with a first set of ciphertext symbols, a first permutation for the first set, and a first partition for the first permutation. The method includes obtaining, from the input data, a first plaintext symbol; mapping the first plaintext symbol to a first ciphertext symbol using the cipher, the mapping including: identifying a first set of candidate ciphertext symbols using the first plaintext symbol, the first permutation, and the first partition; and identifying, at random, the first ciphertext symbol from the first set of candidate ciphertext symbols; and outputting the first ciphertext symbol.
    Type: Application
    Filed: June 24, 2019
    Publication date: December 26, 2019
    Inventors: Charles H. Kaman, Nathaniel Welch, Richard D. Fiorentino, Mario Troiani
  • Publication number: 20190394171
    Abstract: Techniques for securing communication. The techniques include using at least one device to perform: selecting a first operation from a plurality of operations, each of the plurality of operations associated with a respective type of data to be encrypted; generating first data to be encrypted at least in part by performing the first operation; encrypting both information identifying the first operation and the first data to obtain corresponding first ciphertext; and outputting the first ciphertext.
    Type: Application
    Filed: June 24, 2019
    Publication date: December 26, 2019
    Inventors: Charles H. Kaman, Nathaniel Welch, Richard D. Fiorentino, Mario Troiani
  • Patent number: 10063567
    Abstract: A method of detecting aberrant behavior in a software application is described. The method includes instantiating replicated applications on computing devices using identical initial setting. Each replicated application is a replicated instance of the software application. Information associated with a first API call from the first replicated application, and information associated with a second API call from the second replicated application is received. The information includes a call identifier of the API call and a digest. The call identifier is unique during the lifetime of the replicated application issuing it and is identical across the replicated applications. If the first and second call identifiers are identical, the method determines whether the first and second digests match. The method also includes, in response to the first and second digests not matching, signaling that aberrant behavior has occurred. Apparatus and computer readable media are also described.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: August 28, 2018
    Assignee: Virtual Software Systems, Inc.
    Inventors: Richard D. Fiorentino, Charles H. Kaman, Mario Troiani, Erik Muench
  • Publication number: 20160142422
    Abstract: A method of detecting aberrant behavior in a software application is described. The method includes instantiating replicated applications on computing devices using identical initial setting. Each replicated application is a replicated instance of the software application. Information associated with a first API call from the first replicated application, and information associated with a second API call from the second replicated application is received. The information includes a call identifier of the API call and a digest. The call identifier is unique during the lifetime of the replicated application issuing it and is identical across the replicated applications. If the first and second call identifiers are identical, the method determines whether the first and second digests match. The method also includes, in response to the first and second digests not matching, signaling that aberrant behavior has occurred. Apparatus and computer readable media are also described.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 19, 2016
    Inventors: Richard D. Fiorentino, Charles H. Kaman, Mario Troiani, Erik Muench
  • Patent number: 6038685
    Abstract: In a first aspect, a method of synchronizing at least two computing elements that each have clocks that operate asynchronously of the clocks of the other computing elements includes selecting one or more signals, designated as meta time signals, from a set of signals produced by the computing elements, monitoring the computing elements to detect the production of a selected signal by one of the computing elements, waiting for the other computing elements to produce a selected signal, transmitting equally valued time updates to each of the computing elements, and updating the clocks of the computing elements based on the time updates.In a second aspect, fault resilient or fault tolerant computers are produced by designating a first processor as a computing element, designating a second processor as a controller, connecting the computing element and the controller to produce a modular pair, and connecting at least two modular pairs to produce a fault resilient or fault tolerant computer.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: March 14, 2000
    Assignee: Marathon Technologies Corporation
    Inventors: Thomas Dale Bissett, Richard D. Fiorentino, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay, Mario Troiani
  • Patent number: 5956474
    Abstract: Fault resilient or fault tolerant computers are produced by designating a first processor as a computing element, designating a second processor as a controller, connecting the computing element and the controller to produce a modular pair, and connecting at least two module pairs to produce a fault resilient or fault tolerant computer. Each computing element of the computer performs all instructions in the same number of cycles as the other computing element. The controllers provide input/output processings for the computing elements, as well as monitor their operations to detect errors, and control operation of the computing elements in response to the detected errors.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: September 21, 1999
    Assignee: Marathon Technologies Corporation
    Inventors: Thomas Dale Bissett, Richard D. Fiorentino, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay, Mario Troiani
  • Patent number: 5615403
    Abstract: The effects of I/O race conditions caused by asynchrony between processors concurrently executing the same software and I/O devices are eliminated by executing an application program and a first associated operating system with firs processors, and executing an I/O processing program and a second associated operating system with an I/O processor. Memory requests from the application program or the first associated operating system are processed with the first processors, and memory requests from the application program to memory addresses associated with I/O devices are trapped and transmitted to the I/O processor. The I/O processor then performs the trapped memory requests with the I/O processing program after waiting for the identical request to be received from each of the first processors to eliminate the effects of race conditions caused by asynchrony between processors concurrently executing the application program or the first associated operating system and I/O devices.
    Type: Grant
    Filed: October 2, 1995
    Date of Patent: March 25, 1997
    Assignee: Marathon Technologies Corporation
    Inventors: Thomas D. Bissett, Richard D. Fiorentino, Robert M. Glorioso, Diane T. McCauley, James D. McCollum, Glenn A. Tremblay, Mario Troiani