Patents by Inventor Marius-Aurel Balanica

Marius-Aurel Balanica has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for filtering received data units
    Patent number: 9331982
    Abstract: A system for filtering received data units comprises a memory structure adapted to store a plurality of P tables, each table comprising a plurality of filter-keys and corresponding indices, each filter-key comprising one or more key-bits each corresponding to a filter configurable by a corresponding filter configuration value; and at least one processing element connected to the memory structure and comprising a digesting module adapted to generate the one or more key-bits of each of the filter-keys of the tables by splitting the corresponding filter configuration value into P configuration-pieces each having a number of bits, and to use each configuration-piece as a first index for setting a corresponding key-bit in the corresponding table; and a filtering module adapted to receive and split the data units into P data-pieces each having the number of bits, for each data-piece use the data-piece as a second index for reading the corresponding filter-key from the corresponding table, and generate a pass-indica
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: May 3, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Marius-Aurel Balanica
  • SYSTEM AND METHOD FOR FILTERING RECEIVED DATA UNITS
    Publication number: 20120179892
    Abstract: A system for filtering received data units comprises a memory structure adapted to store a plurality of P tables, each table comprising a plurality of filter-keys and corresponding indices, each filter-key comprising one or more key-bits each corresponding to a filter configurable by a corresponding filter configuration value; and at least one processing element connected to the memory structure and comprising a digesting module adapted to generate the one or more key-bits of each of the filter-keys of the tables by splitting the corresponding filter configuration value into P configuration-pieces each having a number of bits, and to use each configuration-piece as a first index for setting a corresponding key-bit in the corresponding table; and a filtering module adapted to receive and split the data units into P data-pieces each having the number of bits, for each data-piece use the data-piece as a second index for reading the corresponding filter-key from the corresponding table, and generate a pass-indica
    Type: Application
    Filed: September 30, 2009
    Publication date: July 12, 2012
    Applicant: Freescale Semiconductor, Inc.
    Inventor: Marius-Aurel Balanica