Patents by Inventor Mariusz Stepka

Mariusz Stepka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240095315
    Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement license management solutions for software defined silicon (SDSi) products are disclosed. Example license management solutions disclosed herein include, but are not limited to, virtual resource migration using SDSi, resource configuration management using SDSi, hardware self-configuration using SDSi, reduced footprint agents using SDSi, performing SDSi usage evaluation and corresponding license transfer responsive to detected and/or predicted failures, transferring node locked SDSi licenses, transfer of SDSi licenses without a trusted license server, community license generation, expirable SDSi licenses via a reliable clock, non-node locked licenses via blockchain, and activating hardware features with a pre-generated hardware license.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 21, 2024
    Inventors: Katalin Bartfai-Walcott, Mariusz Oriol, Vasudevan Srinivasan, Peggy Irelan, Mariusz Stepka, Kaitlin Murphy, Bharat Pillilli, Mark Baldwin, Mateusz Bronk, Fariaz Karim, Arkadiusz Berent, Vasuki Chilukuri
  • Patent number: 11544129
    Abstract: Systems, apparatuses and methods may provide for technology that detects a successful boot of a first firmware component in a computing system, receives a signal from a second firmware component in the computing system, and detects an incompatibility of the first firmware component with respect to the second firmware component based on the signal. In one example, only the first firmware component is repaired in response to the incompatibility.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: January 3, 2023
    Assignee: Intel Corporation
    Inventors: Janusz Jurski, Mariusz Stepka
  • Publication number: 20210397507
    Abstract: Systems, apparatuses and methods may provide for technology that detects a successful boot of a first firmware component in a computing system, receives a signal from a second firmware component in the computing system, and detects an incompatibility of the first firmware component with respect to the second firmware component based on the signal. In one example, only the first firmware component is repaired in response to the incompatibility.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Applicant: Intel Corporation
    Inventors: Janusz Jurski, Mariusz Stepka
  • Patent number: 11113133
    Abstract: Systems, apparatuses and methods may provide for technology that detects a successful boot of a first firmware component in a computing system, receives a signal from a second firmware component in the computing system, and detects an incompatibility of the first firmware component with respect to the second firmware component based on the signal. In one example, only the first firmware component is repaired in response to the incompatibility.
    Type: Grant
    Filed: December 27, 2016
    Date of Patent: September 7, 2021
    Assignee: Intel Corporation
    Inventors: Janusz Jurski, Mariusz Stepka
  • Publication number: 20190347153
    Abstract: Systems, apparatuses and methods may provide for technology that detects a successful boot of a first firmware component in a computing system, receives a signal from a second firmware component in the computing system, and detects an incompatibility of the first firmware component with respect to the second firmware component based on the signal. In one example, only the first firmware component is repaired in response to the incompatibility.
    Type: Application
    Filed: December 27, 2016
    Publication date: November 14, 2019
    Applicant: Intel Corporation
    Inventors: Janusz JURSKI, Mariusz STEPKA
  • Patent number: 10073742
    Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: September 11, 2018
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Mariusz Oriol, Janusz Jurski, Piotr Sawicki, Robert W. Cone, William J. O'Sullivan, Mariusz Stepka, Babak Nikjou, Madhusudhan Rangarajan, Pawel Szymanski, Piotr Kwidzinski, Robert Bahnsen, Mallik Bulusu
  • Patent number: 9547497
    Abstract: Technologies for facilitating inter-system-on-a-chip (SoC) communication include a first SoC, a second SoC, and a dedicated manageability controller network. The first SoC includes a first main processor, a first manageability controller, and a memory dedicated to the first manageability controller and having manageability controller firmware stored thereon. The first manageability controller is different from the first main processor and to control functions of the first SoC. The second SoC is different from the first SoC and includes a second main processor and a second manageability control, which is different from the second main processor and to control functions of the second SoC. The second SoC is to access the manageability controller firmware of the memory of the first SoC over the dedicated manageability network.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: January 17, 2017
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Robert W. Cone, William J. O'Sullivan, Mariusz Oriol, Pawel Szymanski, Babak Nikjou, Madhusudhan Rangarajan, Janusz Jurski, Piotr Kwidzinski, Mariusz Stepka, Piotr Sawicki
  • Publication number: 20160292038
    Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
    Type: Application
    Filed: June 9, 2016
    Publication date: October 6, 2016
    Inventors: Robert C. Swanson, Mariusz Oriol, Janusz Jurski, Piotr Sawicki, Robert W. Cone, William J. O'Sullivan, Mariusz Stepka, Babak Nikjou, Madhusudhan Rangarajan, Pawel Szymanski, Piotr Kwidzinski, Robert Bahnsen, Mallik Bulusu
  • Publication number: 20160202994
    Abstract: Technologies for facilitating inter-system-on-a-chip (SoC) communication include a first SoC, a second SoC, and a dedicated manageability controller network. The first SoC includes a first main processor, a first manageability controller, and a memory dedicated to the first manageability controller and having manageability controller firmware stored thereon. The first manageability controller is different from the first main processor and to control functions of the first SoC. The second SoC is different from the first SoC and includes a second main processor and a second manageability control, which is different from the second main processor and to control functions of the second SoC. The second SoC is to access the manageability controller firmware of the memory of the first SoC over the dedicated manageability network.
    Type: Application
    Filed: September 27, 2013
    Publication date: July 14, 2016
    Inventors: Robert C. SWANSON, Robert W. CONE, William J. O'SULLIVAN, Mariusz ORIOL, Pawel SZYMANSKI, BABAK NIKJOU, Madhusudhan RANGARAJAN, Janusz JURSKI, Piotr KWIDZINSKI, Mariusz STEPKA, Piotr SAWICKI
  • Patent number: 9367406
    Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: June 14, 2016
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Mariusz Oriol, Janusz Jurski, Piotr Sawicki, Robert W. Cone, William J. O'Sullivan, Mariusz Stepka, Babak Nikjou, Madhusudhan Rangarajan, Pawel Szymanski, Piotr Kwidzinski, Robert Bahnsen, Mallik Bulusu
  • Publication number: 20150052389
    Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.
    Type: Application
    Filed: August 14, 2013
    Publication date: February 19, 2015
    Inventors: Robert C. Swanson, Mariusz Oriol, Janusz Jurski, Piotr Sawicki, Robert W. Cone, William J. O'Sullivan, Mariusz Stepka, Babak Nikjou, Madhusudhan Rangarajan, Pawel Szymanski, Piotr Kwidzinski, Robert Bahnsen, Mallik Bulusu