Patents by Inventor Mark A. Chonko

Mark A. Chonko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5589423
    Abstract: A process for the fabrication of a non-silicided region in an integrated circuit includes the fabrication of a silicide blocking layer (24, 46, 54, 92, 112). In one embodiment, a field transistor (80) is formed by depositing a silicide blocking layer (84) overlying a field gate electrode (70) and source and drain regions (76, 78). A carbonaceous mask (86) is formed on the silicide blocking layer (84) overlying the field transistor (80). A partial etching process is performed to remove a portion of the silicide blocking layer (84) exposed by the carbonaceous mask (86). Then, the carbonaceous mask (86) is removed and the etching process is continued to completely remove portions of the silicide blocking layer (84) not originally protected by the carbonaceous mask (86). The etching process forms a silicide blocking layer (92) overlying the field transistor (80) and sidewall (94) adjacent to an MOS gate electrode (68).
    Type: Grant
    Filed: October 3, 1994
    Date of Patent: December 31, 1996
    Assignee: Motorola Inc.
    Inventors: Ted R. White, Ting-Chen Hsu, Bradley M. Somero, Mark A. Chonko, Jung-Hui Lin