Patents by Inventor Mark A. Couture

Mark A. Couture has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for testing integrated circuit chips
    Patent number: 5528159
    Abstract: A method and apparatus for testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O contacts. The apparatus is provided with an interposer that has contacts corresponding to the contacts on the semiconductor chip. Both the chip and the interposer contacts can be any known type including metal ball, bumps, or tabs or may be provided with dendritic surfaces. The chip contacts are first brought into relative loose temporary contact with the contacts on the interposer and then a compressive force greater that 5 grams per chip contact is applied to the chip to force the chip contacts into good electrical contact with the interposer contacts. Testing of the chip is then performed. The tests may include heating of the chip as well as the application of signals to the chip contacts. After testing the chip is removed from the substrate.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: June 18, 1996
    Assignee: International Business Machine Corp.
    Inventors: Richard G. Charlton, George C. Correia, Mark A. Couture, Gary R. Hill, Kibby B. Horsford, Anthony P. Ingraham, Michael D. Lowell, Voya R. Markovich, Gordon C. Osborne, Jr., Mark V. Pierson
  • Method and apparatus for testing integrated circuit chips
    Patent number: 5523696
    Abstract: A method and apparatus for testing semi-conductor chips is disclosed. The individual semiconductor chips have I/O contacts. The apparatus is provided with an interposer that has contacts corresponding to the contacts on the semiconductor chip. Both the chip and the interposer contacts can be any known type including metal ball, bumps, or tabs or may be provided with dendritic surfaces. The chip contacts are first brought into relative loose temporary contact with the contacts on the interposer and then a compressive force greater that 5 grams per chip contact is applied to the chip to force the chip contacts into good electrical contact with the interposer contacts. Testing of the chip is then performed. The tests may include heating of the chip as well as the application of signals to the chip contacts. After testing the chip is removed from the substrate.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: June 4, 1996
    Assignee: International Business Machines Corp.
    Inventors: Richard G. Charlton, George C. Correla, Mark A. Couture, Gary R. Hill, Kibby B. Horsford, Anthony P. Ingraham, Michael D. Lowell, Voya R. Markovich, Gordon C. Osborne, Jr., Mark V. Pierson