Abstract: A language communication device in the form of headphones. The headphones have two earpieces, each of the earpieces having a speaker, a first of the earpieces having a short range receiver for receiving audible signals representative of a first language, and a second of the earpieces having a short range transceiver. A microphone input unit is also provided. A control unit connected to the earpieces has a memory device and a translation unit for translating the first language into another language. Software resides in the control unit. A momentary switch is provided for allowing a user to access the software. The language communication device also has a mechanism for receiving a content stream such as music from an external source, which content stream can be muted when the momentary switch is pressed by the user or the short range receiver detects audible signals representative of a language.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed. In one preferred arrangement, a method includes the steps of generating a sequence of excimer laser pulses, controllably modulating each excimer laser pulse in the sequence to a predetermined fluence, masking portions of each fluence controlled laser pulse in the sequence with a two dimensional pattern of slits to generate a sequence of fluence controlled pulses of line patterned beamlets, irradiating an amorphous silicon thin film sample with the sequence of fluence controlled slit patterned beamlets to effect melting of portions thereof, and controllably sequentially translating a relative position of the sample with respect to each of the fluence controlled pulse of slit patterned beamlets to thereby process the amorphous silicon thin film sample into a single or polycrystalline silicon thin film.

Abstract: A device on a supporting substrate is provided including a semiconductor film, having two or more rectangular crystalline regions spaced from each other, wherein each of the two or more rectangular crystalline regions comprises one single crystal region. The device can further include two or more thin-film transistors, wherein each of the two or more thin-film transistors comprises one or more active-channel regions. Each of the one or more active-channel regions can comprise at least one of said two or more rectangular crystalline regions. The device can further include an integrated circuit which comprises of the two or more thin-film transistors.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed. One method includes generating a sequence of excimer laser pulses, controllably modulating each pulse to a predetermined fluence, homoginizing each modulated pulse in a predetermined plane, masking portions of each homoginized pulse with a pattern of slits to generate a sequence of fluence controlled pulses of line patterned beamlets, each slit in the pattern of slits being sufficiently narrow to prevent inducement of significant nucleation in region of a silicon thin film sample irradiated by a beamlet corresponding to the slit, irradiating an amorphous silicon thin film sample with the sequence of fluence controlled slit patterned beamlets to effect melting of portions corresponding to each fluence controlled patterned beamlet pulse, and controllably sequentially translating a relative position of the sample with respect to each of the fluence controlled pulse of slit patterned beamlets.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed.

Abstract: A fabrication method is provided for a core-shell-shell (CSS) nanowire transistor (NWT). The method provides a cylindrical CSS nanostructure with a semiconductor core, an insulator shell, and a conductive shell. The CSS nanostructure has a lower hemicylinder overlying a substrate surface. A first insulating film is conformally deposited overlying the CSS nanostructure and anisotropically plasma etched. Insulating reentrant stringers are formed adjacent the nanostructure lower hemicylinder. A conductive film is conformally deposited and selected regions are anisotropically plasma etched, forming conductive film gate straps overlying a gate electrode in a center section of the CSS nanostructure. An isotropically etching removes the insulating reentrant stringers adjacent the center section of the CSS nanostructure, and an isotropically etching of the conductive shell overlying the S/D regions is performed. A screen oxide layer is deposited over the CSS nanostructure.

Abstract: A fabrication method is provided for a core-shell-shell (CSS) nanowire transistor (NWT). The method provides a cylindrical CSS nanostructure with a semiconductor core, an insulator shell, and a conductive shell. The CSS nanostructure has a lower hemicylinder overlying a substrate surface. A first insulating film is conformally deposited overlying the CSS nanostructure and anisotropically plasma etched. Insulating reentrant stringers are formed adjacent the nanostructure lower hemicylinder. A conductive film is conformally deposited and selected regions are anisotropically plasma etched, forming conductive film gate straps overlying a gate electrode in a center section of the CSS nanostructure. An isotropically etching removes the insulating reentrant stringers adjacent the center section of the CSS nanostructure, and an isotropically etching of the conductive shell overlying the S/D regions is performed. A screen oxide layer is deposited over the CSS nanostructure.

Abstract: A method is provided for removing reentrant stringers in the fabrication of a nanowire transistor (NWT). The method provides a cylindrical nanostructure with an outside surface axis overlying a substrate surface. The nanostructure includes an insulated semiconductor core. A conductive film is conformally deposited overlying the nanostructure, to function as a gate strap or a combination gate and gate strap. A hard mask insulator is deposited overlying the conductive film and selected regions of the hard mask are anisotropically plasma etched. As a result, a conductive film gate electrode is formed substantially surrounding a cylindrical section of nanostructure. Inadvertently, conductive film reentrant stringers may be formed adjacent the nanostructure outside surface axis, made from the conductive film. The method etches, and so removes the conductive film reentrant stringers.

Abstract: A fabrication method is provided for a core-shell-shell (CSS) nanowire transistor (NWT). The method provides a cylindrical CSS nanostructure with a semiconductor core, an insulator shell, and a conductive shell. The CSS nanostructure has a lower hemicylinder overlying a substrate surface. A first insulating film is conformally deposited overlying the CSS nanostructure and anisotropically plasma etched. Insulating reentrant stringers are formed adjacent the nanostructure lower hemicylinder. A conductive film is conformally deposited and selected regions are anisotropically plasma etched, forming conductive film gate straps overlying a gate electrode in a center section of the CSS nanostructure. An isotropically etching removes the insulating reentrant stringers adjacent the center section of the CSS nanostructure, and an isotropically etching of the conductive shell overlying the S/D regions is performed. A screen oxide layer is deposited over the CSS nanostructure.

Abstract: A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.

Abstract: A fabrication method is provided for a core-shell-shell (CSS) nanowire transistor (NWT). The method provides a cylindrical CSS nanostructure with a semiconductor core, an insulator shell, and a conductive shell. The CSS nanostructure has a lower hemicylinder overlying a substrate surface. A first insulating film is conformally deposited overlying the CSS nanostructure and anisotropically plasma etched. Insulating reentrant stringers are formed adjacent the nanostructure lower hemicylinder. A conductive film is conformally deposited and selected regions are anisotropically plasma etched, forming conductive film gate straps overlying a gate electrode in a center section of the CSS nanostructure. An isotropically etching removes the insulating reentrant stringers adjacent the center section of the CSS nanostructure, and an isotropically etching of the conductive shell overlying the S/D regions is performed. A screen oxide layer is deposited over the CSS nanostructure.

Abstract: A method for smoothing an annealed surface uses a sub-resolution mask pattern. The method supplies a laser beam having a first wavelength and a mask with a first mask section having apertures with a first dimension and a second mask section with apertures having a second dimension, less than the first dimension. A laser beam having a first energy density is applied to a substrate region, melting a substrate region in response to the first energy density and crystallizing the substrate region. A diffracted laser beam is applied to the substrate region, smoothing the substrate region surface. Applying a diffracted laser beam to the substrate area may include applying a diffracted laser beam having a second energy density, less than the first energy density, to the substrate region.

Abstract: Systems and methods for reducing a surface roughness of a polycrystalline or single crystal thin film produced by the sequential lateral solidification process are disclosed.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed.

Abstract: A process of lateral crystallization is provided for increasing the lateral growth length (LGL). A localized region of the substrate is heated for a short period of time. While the localized region of the substrate is still heated, a silicon film overlying the substrate is irradiated to anneal the silicon film to crystallize a portion of the silicon film in thermal contact with the heated substrate region. A CO2 laser may be used as a heat source to heat the substrate, while a UV laser or a visible spectrum laser is used to irradiate and crystallize the film.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed.

Abstract: Methods for processing an amorphous silicon thin film sample into a polycrystalline silicon thin film are disclosed.

Abstract: A recessed-gate thin-film transistor (RG-TFT) with a self-aligned lightly doped drain (LDD) is provided, along with a corresponding fabrication method. The method deposits an insulator overlying a substrate and etches a trench in the insulator. The trench has a bottom and sidewalls. An active silicon (Si) layer is formed overlying the insulator and trench, with a gate oxide layer over the active Si layer. A recessed gate electrode is then formed in the trench. The TFT is doped and LDD regions are formed in the active Si layer overlying the trench sidewalls. The LDD regions have a length that extends from a top of the trench sidewall, to the trench bottom, with a doping density that decreases in response to the LDD length. Alternately stated, the LDD length is directly related to the depth of the trench.

Abstract: A method is provided for removing reentrant stringers in the fabrication of a nanowire transistor (NWT). The method provides a cylindrical nanostructure with an outside surface axis overlying a substrate surface. The nanostructure includes an insulated semiconductor core. A conductive film is conformally deposited overlying the nanostructure, to function as a gate strap or a combination gate and gate strap. A hard mask insulator is deposited overlying the conductive film and selected regions of the hard mask are anisotropically plasma etched. As a result, a conductive film gate electrode is formed substantially surrounding a cylindrical section of nanostructure. Inadvertently, conductive film reentrant stringers may be formed adjacent the nanostructure outside surface axis, made from the conductive film. The method etches, and so removes the conductive film reentrant stringers.