Patents by Inventor Mark A. Dexter

Mark A. Dexter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory bit redundant vias
    Patent number: 8649211
    Abstract: An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are in the via path that couples a bitline to Vss. Moreover, an integrated circuit containing a FLASH memory bit with redundant vias in the via path from the bitline to Vss.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: February 11, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Mark A. Dexter, Sarma S. Gunturi
  • Memory bit redundant vias
    Patent number: 8379447
    Abstract: An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are in the via path that couples a bitline to Vss. Moreover, an integrated circuit containing a FLASH memory bit with redundant vias in the via path from the bitline to Vss.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: February 19, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Mark A. Dexter, Sarma S. Gunturi
  • MEMORY BIT REDUNDANT VIAS
    Publication number: 20120257441
    Abstract: An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are in the via path that couples a bitline to Vss. Moreover, an integrated circuit containing a FLASH memory bit with redundant vias in the via path from the bitline to Vss.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Applicant: Texas Instruments Incorporated
    Inventors: Mark A. Dexter, Sarma S. Gunturi
  • Memory Bit Redundant Vias
    Publication number: 20120002471
    Abstract: An integrated circuit containing a memory array with memory bits and a differential sense amplifier for reading the logic state of the memory bits. The integrated circuit also contains redundant vias which are in the via path that couples a bitline to Vss. Moreover, an integrated circuit containing a FLASH memory bit with redundant vias in the via path from the bitline to Vss.
    Type: Application
    Filed: June 30, 2010
    Publication date: January 5, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mark A. Dexter, Sarma S. Gunturi