Patents by Inventor Mark A. Frigaard

Mark A. Frigaard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7623053
    Abstract: In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: November 24, 2009
    Assignee: Medtronic, Inc.
    Inventors: Michael B. Terry, Michael W. Heinks, Joel A. Anderson, Mark A. Frigaard
  • Publication number: 20090079606
    Abstract: In general, this disclosure describes techniques for reducing power consumption within an implantable medical device (IMD). An IMD implanted within a patient may have finite power resources that are intended to last several years. To promote device longevity, sensing and therapy circuits of the IMD are designed to incorporate an analog-to-digital converter (ADC) that provides relatively high resolution output at a relatively low operation frequency, and does so with relatively low power consumption. An ADC designed in accordance with the techniques described herein utilizes a quantizer that has a lower resolution than a digital-to-analog converter (DAC) used for negative feedback. Such a configuration provides the benefits of higher resolution DAC feedback without having the use high oversampling ratios that result in high power consumption. Also, the techniques avoid the use of, and the associated high power consumption of, a high resolution flash ADC, within the sigma delta loop.
    Type: Application
    Filed: September 26, 2007
    Publication date: March 26, 2009
    Inventors: Michael B. Terry, Michael W. Heinks, Joel A. Anderson, Mark A. Frigaard
  • Publication number: 20080079617
    Abstract: An implantable medical device, such as a pacemaker or implantable cardioverter defibrillator, uses digital signal processing channels to process sensed time varying signals representing cardiac activity. Each digital signal processing channels includes a sigma-Delta analog-to-digital converter. The clock rate of each sigma-delta analog-to-digital converter is controlled as a function of a signal detection threshold for its respective digital signal processing channel. For higher threshold levels, a reduced clock rate for the sigma-delta analog-to-digital converter results in reduced power consumption and longer battery life.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Mark A. Frigaard, Michael W. Heinks, Joel A. Anderson, Robert H. Mehregan
  • Patent number: 7345607
    Abstract: An implantable medical device, such as a pacemaker or implantable cardioverter defibrillator, uses digital signal processing channels to process sensed time varying signals representing cardiac activity. Each digital signal processing channels includes a sigma-Delta analog-to-digital converter. The clock rate of each sigma-delta analog-to-digital converter is controlled as a function of a signal detection threshold for its respective digital signal processing channel. For higher threshold levels, a reduced clock rate for the sigma-delta analog-to-digital converter results in reduced power consumption and longer battery life.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: March 18, 2008
    Assignee: Medtronic, Inc.
    Inventors: Mark A. Frigaard, Michael W. Heinks, Joel A. Anderson, Robert H. Mehregan