Patents by Inventor Mark A. Horowitz
Mark A. Horowitz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10411923Abstract: A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.Type: GrantFiled: June 7, 2017Date of Patent: September 10, 2019Assignee: Rambus Inc.Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Fred F. Chen, Elad Alon, Mark A. Horowitz
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Publication number: 20190268187Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.Type: ApplicationFiled: February 27, 2019Publication date: August 29, 2019Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Bruno W. Garlepp, Grace Tsang, Mark A. Horowitz, Jared L. Zerbe, Jason C. Wei
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Patent number: 10366045Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.Type: GrantFiled: November 15, 2017Date of Patent: July 30, 2019Assignee: Rambus Inc.Inventors: Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe
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Patent number: 10317597Abstract: Various aspects of the present disclosure are directed toward optics and imaging. As may be implemented with one or more embodiments, an apparatus includes one or more phase masks that operate with an objective lens and a microlens array to alter a phase characteristic of light travelling in a path from a specimen, through the objective lens and microlens array and to a photosensor array. Using this approach, the specimen can be imaged with spatial resolution characteristics provided via the altered phase characteristic, which can facilitate construction of an image with enhanced resolution.Type: GrantFiled: August 17, 2015Date of Patent: June 11, 2019Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Noy Cohen, Marc S. Levoy, Michael J. Broxton, Logan Grosenick, Samuel Yang, Aaron Andalman, Karl A. Disseroth, Mark A. Horowitz
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Patent number: 10310999Abstract: An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical zero-to-one transitions and one-to-zero transitions and samples the first signal at a rising edge of the timing signal to produce a respective sampled value. The device further includes a receiver circuit to receive the respective sampled value from the DRAM over a plurality of wires separate from the first wire. In a first mode, the transmitter circuit repeatedly transmits incrementally offset versions of the timing signal to the DRAM until sampled values received from the DRAM change from a logical zero to a logical one or vice versa; and in a second mode, it transmits write data over the plurality of wires to the DRAM according to a write timing offset generated based on the sampled values.Type: GrantFiled: September 13, 2017Date of Patent: June 4, 2019Inventors: Jared LeVan Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz, Leung Yu, Roxanne Vu, Jun Kim, Bruno W. Garlepp, Tsyr-Chyang Ho, Benedict Chung-Kwong Lau
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Publication number: 20190163661Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.Type: ApplicationFiled: November 15, 2017Publication date: May 30, 2019Inventors: Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe
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Publication number: 20190095264Abstract: A memory system includes a link having at least one signal line and a controller. The controller includes at least one transmitter coupled to the link to transmit first data, and a first error protection generator coupled to the transmitter. The first error protection generator dynamically adds an error detection code to at least a portion of the first data. At least one receiver is coupled to the link to receive second data. A first error detection logic determines if the second data received by the controller contains at least one error and, if an error is detected, asserts a first error condition. The system includes a memory device having at least one memory device transmitter coupled to the link to transmit the second data. A second error protection generator coupled to the memory device transmitter dynamically adds an error detection code to at least a portion of the second data.Type: ApplicationFiled: September 4, 2018Publication date: March 28, 2019Inventors: Ely K. Tsern, Mark A. Horowitz, Frederick A. Ware
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Patent number: 10225111Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.Type: GrantFiled: February 27, 2018Date of Patent: March 5, 2019Assignee: Rambus Inc.Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Bruno W. Garlepp, Grace Tsang, Mark A. Horowitz, Jared L. Zerbe, Jason C. Wei
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Publication number: 20180335477Abstract: A technique for determining performance characteristics of electronic devices and systems is disclosed. In one embodiment, the technique is realized by measuring a first response on a first transmission line from a single pulse transmitted on the first transmission line, and then measuring a second response on the first transmission line from a single pulse transmitted on at least one second transmission line, wherein the at least one second transmission line is substantially adjacent to the first transmission line. The worst case bit sequences for transmission on the first transmission line and the at least one second transmission line are then determined based upon the first response and the second response for determining performance characteristics associated with the first transmission line.Type: ApplicationFiled: April 19, 2018Publication date: November 22, 2018Inventors: Haw-Jyh Liaw, Xingchao Yuan, Mark A. Horowitz
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Patent number: 10095565Abstract: A memory system includes a link having at least one signal line and a controller. The controller includes at least one transmitter coupled to the link to transmit first data, and a first error protection generator coupled to the transmitter. The first error protection generator dynamically adds an error detection code to at least a portion of the first data. At least one receiver is coupled to the link to receive second data. A first error detection logic determines if the second data received by the controller contains at least one error and, if an error is detected, asserts a first error condition. The system includes a memory device having at least one memory device transmitter coupled to the link to transmit the second data. A second error protection generator coupled to the memory device transmitter dynamically adds an error detection code to at least a portion of the second data.Type: GrantFiled: September 15, 2015Date of Patent: October 9, 2018Assignee: Rambus Inc.Inventors: Ely K. Tsern, Mark A. Horowitz, Frederick A. Ware
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Publication number: 20180287829Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.Type: ApplicationFiled: February 27, 2018Publication date: October 4, 2018Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Bruno W. Garlepp, Grace Tsang, Mark A. Horowitz, Jared L. Zerbe, Jason C. Wei
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Patent number: 9998305Abstract: An integrated circuit device includes an output driver having a data signal terminal, logic circuitry, and a driver circuit coupled to the logic circuitry and data signal terminal. The driver circuit is configured to drive a signal corresponding to a symbol onto the data signal terminal, wherein the symbol is an N-bit symbol, having one of 2N predefined values, N is an integer greater than 1, and the signal corresponding to the symbol has one of 2N signal levels. The driver circuit includes first, second and third driver sub-circuits, each driven by an input corresponding to one or more bits of the N-bit symbol, wherein the second and third driver sub-circuits are weighted, relative to the first driver sub-circuit, to reduce gds distortion in the signal.Type: GrantFiled: January 6, 2017Date of Patent: June 12, 2018Assignee: RAMBUS INC.Inventors: Jared L. Zerbe, Bruno W. Garlepp, Pak S. Chau, Kevin S. Donnelly, Mark A. Horowitz, Stefanos Sidiropoulos, Billy W. Garrett, Jr., Carl W. Werner
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Publication number: 20180157615Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.Type: ApplicationFiled: November 15, 2017Publication date: June 7, 2018Inventors: Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe
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Patent number: 9977076Abstract: A technique for determining performance characteristics of electronic devices and systems is disclosed. In one embodiment, the technique is realized by measuring a first response on a first transmission line from a single pulse transmitted on the first transmission line, and then measuring a second response on the first transmission line from a single pulse transmitted on at least one second transmission line, wherein the at least one second transmission line is substantially adjacent to the first transmission line. The worst case bit sequences for transmission on the first transmission line and the at least one second transmission line are then determined based upon the first response and the second response for determining performance characteristics associated with the first transmission line.Type: GrantFiled: December 22, 2016Date of Patent: May 22, 2018Assignee: Rambus Inc.Inventors: Haw-Jyh Liaw, Xingchao Yuan, Mark A. Horowitz
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Publication number: 20180095916Abstract: An integrated circuit device includes a transmitter circuit operable to transmit a timing signal over a first wire to a DRAM. The DRAM receives a first signal having a balanced number of logical zero-to-one transitions and one-to-zero transitions and samples the first signal at a rising edge of the timing signal to produce a respective sampled value. The device further includes a receiver circuit to receive the respective sampled value from the DRAM over a plurality of wires separate from the first wire. In a first mode, the transmitter circuit repeatedly transmits incrementally offset versions of the timing signal to the DRAM until sampled values received from the DRAM change from a logical zero to a logical one or vice versa; and in a second mode, it transmits write data over the plurality of wires to the DRAM according to a write timing offset generated based on the sampled values.Type: ApplicationFiled: September 13, 2017Publication date: April 5, 2018Inventors: Jared LeVan Zerbe, Kevin S. Donnelly, Stefanos Sidiropoulos, Donald C. Stark, Mark A. Horowitz, Leung Yu, Roxanne Vu, Jun Kim, Bruno W. Garlepp, Tsyr-Chyang Ho, Benedict Chung-Kwong Lau
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Patent number: 9917708Abstract: A signaling system is described. The signaling system comprises a transmit device, a receive device including a partial response receive circuit, and a signaling path coupling the transmit device and the receive device. The receive device observes an equalized signal from the signaling path, and includes circuitry to use feedback from the most recent previously resolved symbol to sample a currently incoming symbol. The transmit device equalizes transmit data to transmit the equalized signal, by applying weighting based on one or more data values not associated with the most recent previously resolved symbol value.Type: GrantFiled: April 6, 2016Date of Patent: March 13, 2018Assignee: Rambus Inc.Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Bruno W. Garlepp, Grace Tsang, Mark A. Horowitz, Jared L. Zerbe, Jason C. Wei
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Patent number: 9852105Abstract: An integrated circuit device includes a transmitter circuit including an output driver. The integrated circuit device includes a first register to store a value representative of a drive strength setting associated with the transmitter circuit such that the output driver outputs data in accordance with the drive strength setting. The integrated circuit device also includes a second register to store a value representative of an equalization setting associated with the transmitter circuit such that the output driver outputs data in accordance with the equalization setting. The integrated circuit device further includes a third register to store a value representative of a slew rate setting associated with the transmitter circuit such that the output driver outputs data in accordance with the slew rate setting.Type: GrantFiled: August 4, 2016Date of Patent: December 26, 2017Assignee: Rambus Inc.Inventors: Mark A. Horowitz, Craig E. Hampel, Alfredo Moncayo, Kevin S. Donnelly, Jared L. Zerbe
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Publication number: 20170365354Abstract: Volatile memory devices may be on a first memory module that is coupled to a memory controller by a first signal path. A nonvolatile memory device may be on a second memory module that is coupled to the first memory module by a second signal path. A memory transaction for the nonvolatile memory device may be transferred from the memory controller to at least one of the volatile memory devices using the first signal path and data associated with the memory transaction is to be written from at least one of the volatile memory devices to the nonvolatile memory device using the second signal path and a control signal. A durability circuit may generate the control signal based on a comparison of a number of write transactions to a particular memory location with a threshold value.Type: ApplicationFiled: August 30, 2017Publication date: December 21, 2017Inventors: Craig Hampel, Mark Horowitz
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Publication number: 20170338981Abstract: A high-speed signaling system with adaptive transmit pre-emphasis. A transmit circuit has a plurality of output drivers to output a first signal onto a signal path. A receive circuit is coupled to receive the first signal via the signal path and configured to generate an indication of whether the first signal exceeds a threshold level. A first threshold control circuit is coupled to receive the indication from the receive circuit and configured to adjust the threshold level according to whether the first signal exceeds the threshold level. A drive strength control circuit is coupled to receive the indication from the receive circuit and configured to adjust a drive strength of at least one output driver of the plurality of output drivers according to whether the first signal exceeds the threshold level.Type: ApplicationFiled: June 7, 2017Publication date: November 23, 2017Inventors: Vladimir M. Stojanovic, Andrew C. Ho, Anthony Bessios, Fred F. Chen, Elad Alon, Mark A. Horowitz
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Patent number: 9807287Abstract: Various approaches to imaging involve selecting directional and spatial resolution. According to an example embodiment, images are computed using an imaging arrangement to facilitate selective directional and spatial aspects of the detection and processing of light data. Light passed through a main lens is directed to photosensors via a plurality of microlenses. The separation between the microlenses and photosensors is set to facilitate directional and/or spatial resolution in recorded light data, and facilitating refocusing power and/or image resolution in images computed from the recorded light data. In one implementation, the separation is varied between zero and one focal length of the microlenses to respectively facilitate spatial and directional resolution (with increasing directional resolution, hence refocusing power, as the separation approaches one focal length).Type: GrantFiled: June 30, 2015Date of Patent: October 31, 2017Assignee: Board of Trustees of the Leland Stanford Junior UniversityInventors: Yi-Ren Ng, Patrick M. Hanrahan, Mark A. Horowitz, Marc S. Levoy