Patents by Inventor Mark A. Kleshock

Mark A. Kleshock has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dual wafer plating fixture for a continuous plating line
    Patent number: 12024785
    Abstract: A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: July 2, 2024
    Assignee: Maxeon Solar Pte. Ltd.
    Inventors: Hung-Ming Wang, Paul W. Loscutoff, Raphael M. Manalo, Arnold V. Castillo, Mohamad Ridzwan Mustafa, Mark A. Kleshock, Neil G. Bergstrom
  • DUAL WAFER PLATING FIXTURE FOR A CONTINUOUS PLATING LINE
    Publication number: 20230193502
    Abstract: A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.
    Type: Application
    Filed: February 8, 2023
    Publication date: June 22, 2023
    Inventors: Hung-Ming Wang, Paul W. Loscutoff, Raphael M. Manalo, Arnold V. Castillo, Mohamad Ridzwan Mustafa, Mark A. Kleshock, Neil G. Bergstrom
  • Dual wafer plating fixture for a continuous plating line
    Patent number: 11598018
    Abstract: A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: March 7, 2023
    Assignee: SunPower Corporation
    Inventors: Hung-Ming Wang, Paul W. Loscutoff, Raphael M. Manalo, Arnold V. Castillo, Mohamad Ridzwan Mustafa, Mark A. Kleshock, Neil G. Bergstrom
  • Structures and methods for forming electrodes of solar cells
    Patent number: 11127871
    Abstract: Solar cells are attached together to form a plating assembly. The plating assembly is attached to a belt, which transports the plating assembly through a plating chamber where metal is electroplated on the solar cells. The electroplated metal is patterned to form metal contact fingers. After the metal is electroplated, the plating assembly is singulated to separate the two solar cells.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: September 21, 2021
    Assignee: SunPower Corporation
    Inventors: Paul W. Loscutoff, Hung-Ming Wang, Matthew J. Dawson, Mark A. Kleshock
  • STRUCTURES AND METHODS FOR FORMING ELECTRODES OF SOLAR CELLS
    Publication number: 20200127150
    Abstract: Solar cells are attached together to form a plating assembly. The plating assembly is attached to a belt, which transports the plating assembly through a plating chamber where metal is electroplated on the solar cells. The electroplated metal is patterned to form metal contact fingers. After the metal is electroplated, the plating assembly is singulated to separate the two solar cells.
    Type: Application
    Filed: October 15, 2019
    Publication date: April 23, 2020
    Applicant: SunPower Corporation
    Inventors: Paul W. LOSCUTOFF, Hung-Ming WANG, Matthew J. DAWSON, Mark A. KLESHOCK
  • DUAL WAFER PLATING FIXTURE FOR A CONTINUOUS PLATING LINE
    Publication number: 20190301047
    Abstract: A wafer plating fixture for use in simultaneously electroplating a two substrates. The wafer plating fixture including: an electrically conductive carrier bus; a plurality of contact clips electrically coupled to the carrier bus and configured to hold the two substrates in place and electrically couple the two substrates to the carrier bus; and a non-conductive substrate backer to separate the two substrates coupled to the carrier bus. A method of electroplating a plurality of substrates. The method including: mounting two substrates to be plated onto a wafer plating fixture; mounting the wafer plating fixture on a continuous belt of plating system; dipping the wafer plating fixture with the two substrates held thereon into an electroplating bath; and applying a voltage to the two substrates via the wafer plating fixture.
    Type: Application
    Filed: March 7, 2019
    Publication date: October 3, 2019
    Inventors: Hung-Ming Wang, Paul W. Loscutoff, Raphael M. Manalo, Amold V. Castillo, Mohamad Ridzwan Mustafa, Mark A. Kleshock, Neil G. Bergstrom