Abstract: Single-die or multi-die packaged modules that incorporate three-dimensional integration of active devices with discrete passive devices to create a package structure that allows active devices (such as, silicon or gallium-arsenide devices) to share the same footprint area as an array of passive surface mount components. In one example, a module includes at least one active device stacked on top of an array of passive surface mount components on a substrate. A conductive or non-conductive adhesive can be used to adhere the active device to the array of passive devices.

Abstract: Single-die or multi-die packaged modules that incorporate three-dimensional integration of active devices with discrete passive devices to create a package structure that allows active devices (such as, silicon or gallium-arsenide devices) to share the same footprint area as an array of passive surface mount components. In one example, a module includes at least one active device stacked on top of an array of passive surface mount components on a substrate. A conductive or non-conductive adhesive can be used to adhere the active device to the array of passive devices.

Abstract: Single-die or multi-die packaged modules that incorporate three-dimensional integration of active devices with discrete passive devices to create a package structure that allows active devices (such as, silicon or gallium-arsenide devices) to share the same footprint area as an array of passive surface mount components. In one example, a module includes at least one active device stacked on top of an array of passive surface mount components on a substrate. A conductive or non-conductive adhesive can be used to adhere the active device to the array of passive devices.

Abstract: A substrate pad in a semiconductor package having a geometry and structure that facilitates providing a solder joint to the pad that has enhanced structural integrity and resistance to mechanical impact. The pad may include a plated metal stud that anchors the solder to the pad interface, providing a more compliant solder joint, even when lead-free solder is used.

Abstract: According to an exemplary embodiment, an overmolded semiconductor package includes at least one semiconductor die situated over a package substrate. The overmolded semiconductor package further includes a mold compound overlying the at least one semiconductor die and the package substrate and having a top surface. The overmolded semiconductor package further includes a first patterned conductive layer situated on the top surface of the mold compound. The overmolded semiconductor package can further include at least one conductive interconnect situated in the mold compound, where the at least one conductive interconnect is electrically connected to the first patterned conductive layer. The first patterned conductive layer can include at least one passive component.

Abstract: Method and structure for securing a mold compound to a printed circuit board is disclosed. A through hole or a blind hole is fabricated in a printed circuit board adjacent to a die. The hole is then filled with a mold compound. The mold compound also surrounds and covers the die. The mold compound within the hole locks the mold compound to the surface of the printed circuit board. In one embodiment, a through hole or a blind hole is fabricated adjacent to a semiconductor die. The semiconductor die is attached to a layer of gold-plated copper on the printed circuit board. After the semiconductor die is attached to the layer of gold-plated copper on the printed circuit board, the semiconductor die is surrounded and covered by the mold compound and the fabricated hole is filled with the mold compound. The mold compound within the hole has good adhesion to the resin layer which constitutes the printed circuit board. This adhesion locks the mold compound securely to the surface of the printed circuit board.