Abstract: Memory testing at system startup, such as boot POST, of an information handling system is accelerated by adjusting memory testing routines to use instructions that take advantage of optimizations made to information handling system and CPU architectures. For instance, memory test iterations in one Mbyte portions using 128-bit SIMD registers, 64-bit MMX registers, ADD and SUB instructions, the MOVNTDQ instruction, and relying on an initial setting of the gate A20 and protected mode result in a substantially accelerated memory test.

Abstract: A method, computer program product and computer system that features intermittently entering the system management mode of a processor to commence and terminate I/O activity between external devices and computer system resources. To that end, a system management interrupt handler is included that monitors bus transactions between a bus controller and an external device that is the subject of I/O activity. Upon sensing the completion of a bus transaction, the system management interrupt handler transmits a system management interrupt to the processor. In response thereto, the processor reads a buffer in the bus controller and provides the requisite resources with the I/O information contained therein.

Abstract: Provided is a method, a computer program product, and a computer system each of which features queuing data transfers between a data port and a system memory to minimize the latency between queuing a data transfer and effectuating the transfer of the same and to remove the chance of more than one device trying to talk to the OS at the same time through the same port. This facilitates backwards compatibility of non-USB compatible computer resources, such as applications, operating systems (O/S) and the like, with USB compatible peripheral devices.

Abstract: A computer system having bus controller operating code stored in a non operating system managed, extended portion of system memory. In one example, the operating code is executed by a bus controller for a computer bus conforming to the Universal Serial Bus (USB) specification. In one example, the bus controller operating code is stored in a portion of system memory that is located above the top system memory address reported to the operating system, thereby hiding the stored code from the operating system. In one example, the bus controller operating code is constructed during the startup of the computer system with a code construction routine. Storing bus controller operating code in a non operating system managed, extended portion of system memory provides a computer system greater flexibility in system memory usage.

Abstract: A semi-automatic pisor of living a slide mounted to a frame is disclosed. The pistol has a hammer assembly and a trigger bar assembly. A trigger bar moves the sear during firing, causing the sear to disengage the hammer. A safety is provided having a cam projection which, upon movement of the safety, provides a caming action to urge the trigger bar downwardly, out of engagement with the sear. A second projection moves to obstruct movement of the sear to prevent firing. Disengagement of the trigger bar from the sear in the safe position eliminates mechanical stress on a forward projecting arm of the sear.