Patents by Inventor Mark A. Owen
Mark A. Owen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8873546Abstract: Method and system for a network switch element is provided. The switch element includes a plurality of megaports, each megaport uniquely identified by a unique megaport address identifier for network addressing. Each megaport includes a plurality of operational ports, each operational port identified by a unique operational port address identifier. The switch element also includes a local crossbar for communication between the plurality of operational ports, and a shared logic module configured to provide common control of the plurality of operational ports within a megaport to allow operational ports to share resource of a single megaport to route network packets there between. The switch element also includes a global crossbar configured to allow communication between the megaports.Type: GrantFiled: October 13, 2011Date of Patent: October 28, 2014Assignee: QLOGIC, CorporationInventors: James A. Kunz, Frank R. Dropps, Edward C. Ross, Mark A. Owen, Craig M. Verba
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Patent number: 8774206Abstract: A high-speed Fiber Channel switch element in a Fiber Channel network is provided. The Fiber Channel switch element includes, a rate select module that allows a port in the Fiber Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20 G, 40 G or at a rate greater than 40 G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10 G.Type: GrantFiled: September 5, 2012Date of Patent: July 8, 2014Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Ernest G. Kohlwey, Mark A. Owen
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Publication number: 20130077637Abstract: A high-speed Fibre Channel switch element in a Fibre Channel network is provided. The Fibre Channel switch element includes, a rate select module that allows a port in the Fibre Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20 G, 40 G or at a rate greater than 40 G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10 G.Type: ApplicationFiled: September 5, 2012Publication date: March 28, 2013Applicant: QLOGIC, CorporationInventors: Frank R. Dropps, Ernest G. Kohlwey, Mark A. Owen
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Patent number: 8295299Abstract: A high-speed Fiber Channel switch element in a Fiber Channel network is provided. The Fiber Channel switch element includes, a rate select module that allows a port in the Fiber Channel switch element to operate at a rate equal to and/or higher than 10 gigabits per second (“G”). The port may operate at 20G, 40G or at a rate greater than 40G. Also, a cut status is provided for cut-through routing between ports operating at different speed. Plural transmit and receive lines are used for port operation at a rate equal to or higher than 10G.Type: GrantFiled: October 1, 2004Date of Patent: October 23, 2012Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Ernest G. Kohlwey, Mark A. Owen
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Publication number: 20120069839Abstract: Method and system for a network switch element is provided. The switch element includes a plurality of megaports, each megaport uniquely identified by a unique megaport address identifier for network addressing. Each megaport includes a plurality of operational ports, each operational port identified by a unique operational port address identifier. The switch element also includes a local crossbar for communication between the plurality of operational ports, and a shared logic module configured to provide common control of the plurality of operational ports within a megaport to allow operational ports to share resource of a single megaport to route network packets there between. The switch element also includes a global crossbar configured to allow communication between the megaports.Type: ApplicationFiled: October 13, 2011Publication date: March 22, 2012Applicant: QLOGIC, CorporationInventors: James A. Kunz, Frank R. Dropps, Edward C. Ross, Mark A. Owen, Craig M. Verba
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Patent number: 8116311Abstract: Method and system for a switch element is provided. The method includes (a) receiving a portion of a packet at a port of the switch element; (b) generating a tag based on an estimated packet size obtained from the portion of the packet; (c) sending the tag with the estimated packet size to a transmit segment of the port; (d) selecting a request from among a plurality of pending requests for processing the packet associated with the tag; (e) receiving an actual packet size for the packet in step (a); (f) determining if the actual packet size is different from the estimated packet size; and (g) adjusting an arbitration weight used for selecting the request in step (d), if the actual packet size is different from the estimated packet size.Type: GrantFiled: November 9, 2009Date of Patent: February 14, 2012Assignee: QLOGIC, CorporationInventors: James A. Kunz, Mark A. Owen
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Patent number: 8072988Abstract: A method and system for distributing credit using a fiber channel switch element is provided. The switch element includes, a wait threshold counter that is used to set up a status for a port that has to wait for certain duration to send a frame due to lack of buffer to buffer credit; a credit module that controls buffer to buffer credit for a transmit segment of the fiber channel switch element; and a virtual lane credit module with a counter that is incremented every time a frame assigned to a virtual lane is sent and decreased every time a VC_RDY is received. The method includes, determining if a VC_RDY primitive is received; and allocating credit to a virtual lane that is not at its maximum credit, after the VC_RDY primitive is received.Type: GrantFiled: October 15, 2009Date of Patent: December 6, 2011Assignee: QLOGIC, CorporationInventors: Frank R Dropps, Ernest G Kohlwey, Edward C. Ross, Mark A. Owen
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Patent number: 8068482Abstract: Method and system for a network switch element is provided. The switch element includes a plurality of megaports, each megaport uniquely identified by a unique megaport address identifier for network addressing. Each megaport includes a plurality of operational ports, each operational port identified by a unique operational port address identifier. The switch element also includes a local crossbar for communication between the plurality of operational ports, and a shared logic module configured to provide common control of the plurality of operational ports within a megaport to allow operational ports to share resource of a single megaport to route network packets there between. The switch element also includes a global crossbar configured to allow communication between the megaports.Type: GrantFiled: September 9, 2009Date of Patent: November 29, 2011Assignee: QLOGIC, CorporationInventors: James A. Kunz, Frank R. Dropps, Edward C. Ross, Mark A. Owen, Craig M. Verba
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Publication number: 20100128607Abstract: A method and system for distributing credit using a fibre channel switch element is provided. The switch element includes, a wait threshold counter that is used to set up a status for a port that has to wait for certain duration to send a frame due to lack of buffer to buffer credit; a credit module that controls buffer to buffer credit for a transmit segment of the fibre channel switch element; and a virtual lane credit module with a counter that is incremented every time a frame assigned to a virtual lane is sent and decreased every time a VC_RDY is received. The method includes, determining if a VC_RDY primitive is received; and allocating credit to a virtual lane that is not at its maximum credit, after the VC_RDY primitive is received.Type: ApplicationFiled: October 15, 2009Publication date: May 27, 2010Inventors: Frank R. Dropps, Ernest G. Kohlwey, Edward C. Ross, Mark A. Owen
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Publication number: 20100118880Abstract: Method and system for a network switch element is provided. The switch element includes a plurality of megaports, each megaport uniquely identified by a unique megaport address identifier for network addressing. Each megaport includes a plurality of operational ports, each operational port identified by a unique operational port address identifier. The switch element also includes a local crossbar for communication between the plurality of operational ports, and a shared logic module configured to provide common control of the plurality of operational ports within a megaport to allow operational ports to share resource of a single megaport to route network packets there between.Type: ApplicationFiled: September 9, 2009Publication date: May 13, 2010Inventors: James A. Kunz, Frank R. Dropps, Edward C. Ross, Mark A. Owen, Craig M. Verba
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Patent number: 7669001Abstract: A method and system for processing received and transmit data by an application specific integrated circuit (ASIC) from a network link. The method for received data includes swapping received data polarity if swap-polarity ability is set and swapping byte lanes for the received data if swap-lane ability is set. The method for transmit data includes swapping byte lanes for transmit data, if swap-byte lane ability is set and swapping data polarity if swap-polarity ability is set. The ASIC includes a network connector that receives and transmits data from the network link.Type: GrantFiled: August 31, 2006Date of Patent: February 23, 2010Assignee: QLOGIC, CorporationInventors: Mark A. Owen, Frank R. Dropps, Leonard W. Haseman
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Patent number: 7649903Abstract: Method and system for routing fiber channel frames using a fiber channel switch element is provided. The method includes, inserting a time stamp value in a fiber channel frame that is received at a receive segment of the fibre channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fiber channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fiber channel frame with a programmed time out value and a global counter value.Type: GrantFiled: August 11, 2008Date of Patent: January 19, 2010Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Craig M. Verba, Gary M. Papenfuss, Ernest G Kohlwey, Mark A. Owen
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Patent number: 7630384Abstract: A method and system for distributing credit using a fiber channel switch element is provided. The switch element includes, a wait threshold counter that is used to set up a status for a port that has to wait for certain duration to send a frame due to lack of buffer to buffer credit; a credit module that controls buffer to buffer credit for a transmit segment of the fiber channel switch element; and a virtual lane credit module with a counter that is incremented every time a frame assigned to a virtual lane is sent and decreased every time a VC_RDY is received. The method includes, determining if a VC_RDY primitive is received; and allocating credit to a virtual lane that is not at its maximum credit, after the VC_RDY primitive is received.Type: GrantFiled: July 20, 2004Date of Patent: December 8, 2009Assignee: QLOGIC, CorporationInventors: Frank R Dropps, Ernest G Kohlwey, Edward C. Ross, Mark A. Owen
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Patent number: 7518995Abstract: Method and system for managing frame traffic in a Fibre Channel network with plural switch elements with receive and transmit ports is provided. The method includes limiting a number of R_RDYs sent between frames, when frames are waiting to be transmitted at a given time, for minimizing a number of ordered sets transmitted between frames. The switch element includes a R_RDY control module that stores a number of R_RDYs that a port has to send, stores an actual number of R_RDYs that are sent since a last frame is transmitted; stores a number of R_RDYs that are sent between frames and this number of R_RDYs can be programmed to be less than two; and stores a threshold value that is less than or equal to a maximum R_RDY count value.Type: GrantFiled: February 27, 2006Date of Patent: April 14, 2009Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Ernest G Kohlwey, Mark A. Owen
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Publication number: 20090041029Abstract: Method and system for routing fibre channel frames using a fibre channel switch element is provided. The method includes, inserting a time stamp value in a fibre channel frame that is received at a receive segment of the fibre channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fibre channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fibre channel frame with a programmed time out value and a global counter value.Type: ApplicationFiled: August 11, 2008Publication date: February 12, 2009Inventors: Frank R. Dropps, Craig M. Verba, Gary M. Papenfuss, Ernest G. Kohlwey, Mark A. Owen
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Patent number: 7430175Abstract: Method and system for routing fiber channel frames using a fiber channel switch element is provided. The method includes, inserting a time stamp value in a fiber channel frame that is received at a receive segment of the fiber channel switch element; determining if a timeout occurs after a frame arrives at a receive buffer; and processing the frame if the timeout occurred. The method also includes, determining if a delta time value, which provides an accumulated wait time for a frame, is present in frame data; subtracting the delta time stamp value from a global time stamp value and using the resulting time stamp value to determine frame timeout status in the fiber channel switch element. A timeout checker circuit declares a timeout after comparing a time stamp value that is inserted in a fiber channel frame with a programmed time out value and global counter value.Type: GrantFiled: July 20, 2004Date of Patent: September 30, 2008Assignee: QLOGIC, CorporationInventors: Frank R. Dropps, Craig M. Verba, Gary M. Papenfuss, Ernest G Kohlwey, Mark A. Owen
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Patent number: 7319669Abstract: A system and method for transmitting and bundling network packets is provided. The incoming network packet size is determined and if the remote buffer space is sufficient to hold the network packet it is transmitted to the destination port. If the remote buffer space is not enough to hold the network packet it is discarded. The system includes an arbitration module that receives remote buffer space information and transmits the network packet if the remote buffer space has enough space to hold the packet. The arbitration module also determines if a second network packet is from a same source port having a same source virtual lane, and has the same destination virtual lane (bundling conditions). If the second network packet meets the bundling conditions, then it is transmitted after the first network packet, even if other packets were received before the second network packet.Type: GrantFiled: November 22, 2002Date of Patent: January 15, 2008Assignee: QLogic, CorporationInventors: James A. Kunz, Leonard W. Haseman, Mark A. Owen, William J. Gustafson