Patents by Inventor Mark A. Rosenau
Mark A. Rosenau has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11073809Abstract: Devices, systems and methods for controlling electrical loads in one or more areas. A method includes transmitting, with a microcontroller via a transceiver, a sync packet including a unique address of the lighting fixture control module to a bus. The method includes listening, via the transceiver, on the bus. The method includes placing the microcontroller into a master operation mode when a master sync timeout period expires without receiving a second sync packet including a unique address for a second master device from the bus. The method includes placing the microcontroller into a subordinate operation mode when the second sync packet is received from the bus during the master sync timeout period.Type: GrantFiled: August 30, 2019Date of Patent: July 27, 2021Assignee: Hubbell IncorporatedInventors: Theodore E. Weber, Mark A. Rosenau, Thomas J. Hartnagel, Michael L. Muecke, Terrence R. Arbouw
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Publication number: 20190384248Abstract: Devices, systems and methods for controlling electrical loads in one or more areas. A method includes transmitting, with a microcontroller via a transceiver, a sync packet including a unique address of the lighting fixture control module to a bus. The method includes listening, via the transceiver, on the bus. The method includes placing the microcontroller into a master operation mode when a master sync timeout period expires without receiving a second sync packet including a unique address for a second master device from the bus. The method includes placing the microcontroller into a subordinate operation mode when the second sync packet is received from the bus during the master sync timeout period.Type: ApplicationFiled: August 30, 2019Publication date: December 19, 2019Inventors: Theodore E. Weber, Mark A. Rosenau, Thomas J. Hartnagel, Michael L. Muecke, Terrence R. Arbouw
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Patent number: 10416631Abstract: Devices, systems and methods for controlling electrical loads in one or more areas. A method includes transmitting, with a microcontroller via a transceiver, a sync packet including a unique address of the lighting fixture control module to a bus. The method includes listening, via the transceiver, on the bus. The method includes placing the microcontroller into a master operation mode when a master sync timeout period expires without receiving a second sync packet including a unique address for a second master device from the bus. The method includes placing the microcontroller into a subordinate operation mode when the second sync packet is received from the bus during the master sync timeout period.Type: GrantFiled: April 24, 2017Date of Patent: September 17, 2019Assignee: Hubbell IncorporatedInventors: Theodore E. Weber, Mark A. Rosenau, Thomas J. Hartnagel, Michael L. Muecke, Terrence R. Arbouw
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Publication number: 20170308048Abstract: Devices, systems and methods for controlling electrical loads in one or more areas. A method includes transmitting, with a microcontroller via a transceiver, a sync packet including a unique address of the lighting fixture control module to a bus. The method includes listening, via the transceiver, on the bus. The method includes placing the microcontroller into a master operation mode when a master sync timeout period expires without receiving a second sync packet including a unique address for a second master device from the bus. The method includes placing the microcontroller into a subordinate operation mode when the second sync packet is received from the bus during the master sync timeout period.Type: ApplicationFiled: April 24, 2017Publication date: October 26, 2017Inventors: Theodore E. Weber, Mark A. Rosenau, Thomas J. Hartnagel, Michael L. Muecke, Terrence R. Arbouw
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Patent number: 5815634Abstract: A multimedia system including an audio/video decoder/decompresser for decoding/decompressing a compressed encoded audio/video data stream to generate video images for display and audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder with an audio/video synchronization circuit for substantially synchronizing the display of video images with audio playback. In addition, a step control is provided to allow for viewing of video images on a frame-by frame basis or to freeze or play video in slow motion. When step control is activated, audio output is muted. Audio data corresponding to displayed video is transmitted to the muted audio decoder. An internal system clock may be suppressed to the system clock counter. An external CPU may provide system clock start times corresponding to video frames to be displayed. The external CPU may increment the system clock counter by a an amount corresponding to the difference between a successive frame or number of frames.Type: GrantFiled: December 14, 1994Date of Patent: September 29, 1998Assignee: Cirrus Logic, Inc.Inventors: Daniel T. Daum, Mark A. Rosenau, Jeffrey G. Ort, Richard Chang, Chih-Ta Sung, Tzoyao Chan
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Patent number: 5598352Abstract: A multimedia system including an audio/video decoder/decompresser for decoding/decompressing a compressed encoded audio/video data stream to generate video images for display and audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder with an audio/video synchronization circuit for substantially synchronizing the display of video images with audio playback. An audio presentation time stamp (APTS) is detected in the compressed/coded audio data stream in the integrated system and video decoder and stored in a data latch. The compressed/coded audio data stream is fed to an audio decoder which decodes/decompresses the audio data and outputs and audio signal. The audio decoder detects when audio data corresponding to an APTS had been output and sets a corresponding flag. The flag indicates to the integrated system and video decoder that a corresponding audio segment had been decoded/decompressed and output.Type: GrantFiled: December 14, 1994Date of Patent: January 28, 1997Assignee: Cirrus Logic, Inc.Inventors: Mark A. Rosenau, Daryl Sartain, Daniel T. Daum, Jeffrey G. Ort
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Patent number: 5594660Abstract: A multimedia system including an audio/video decoder/decompresser for decoding/decompressing a compressed encoded audio/video data stream to generate video images for display and audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder with an audio/video synchronization circuit for substancially synchronizing the display of video images with audio playback. A method is described for detecting when the playback of audio and the display of video images are out of synchronization. The circuitry includes three programmable registers, a finite state machine and one full adder using an audio presentation time stamp and the video presentation time stamp. The method uses a rounded programmable bias value which is compared with the difference between the video presentation time stamp and the audio presentation time stamps.Type: GrantFiled: September 30, 1994Date of Patent: January 14, 1997Assignee: Cirrus Logic, Inc.Inventors: Chih-Ta Sung, Tzoyao Chan, Richard Chang, Mark A. Rosenau, Jeffrey G. Ort, Daniel T. Daum, Yuanyuan Sun
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Patent number: 5142363Abstract: A method and apparatus for scaling interlaced video data allows the video data to be scaled to any desired size, either larger or smaller than the original image. The method considers each line of input data in each field sequentially, and determines whether the line is to be saved and whether the data lines in each successive field will also be saved, discarded, or duplicated, saving space in the output buffer for the saved and duplicated data lines to come as necessary. The method can accommodate interlaced data with N field and a scaling factor M.Type: GrantFiled: March 21, 1991Date of Patent: August 25, 1992Assignee: Chips and Technologies, Inc.Inventors: Arun Johary, Mark A. Rosenau
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Patent number: 5025315Abstract: A method and apparatus for scaling interlaced video data allows the video data to be scaled to any desired size, either larger or smaller than the original image. The method considers each line of input data in each field sequentially, and determines whether the line is to be saved and whether the data lines in each successive field will also be saved, discarded, or duplicated, saving space in the output buffer for the saved and duplicated data lines to come as necessary. The method can accommodate interlaced data with N field and a scaling factor M. An apparatus for implementing the method for two header fields and scaling factor N is also described.Type: GrantFiled: September 6, 1990Date of Patent: June 18, 1991Assignee: Chips and Technologies, Inc.Inventors: Arun Johary, Mark A. Rosenau