Patents by Inventor Mark A. Shill

Mark A. Shill has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8514120
    Abstract: An apparatus is provided that comprises resistors, a first set of switches, and a second set of switches. The resistors are arranged in an array having columns and rows, where the number of resistors is an integer multiple of the number of columns or rows. The resistors are coupled together in a skip-K pattern. Each switch from the first and second sets of switches is coupled to the resistor string, and the first and second sets of switches are each arranged in a sequence and are offset from one another by an offset value. The first and second sets of switches are arranged along the periphery of the array such that each switch from the first set of switches is located in proximity to and is associated with the same row or the same column as its corresponding switch in the sequence from the second set of switches.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: August 20, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Ralph G. Oberhuber, Tsedeniya A. Abraham, Mark Shill
  • Publication number: 20130113643
    Abstract: An apparatus is provided that comprises resistors, a first set of switches, and a second set of switches. The resistors are arranged in an array having columns and rows, where the number of resistors is an integer multiple of the number of columns or rows. The resistors are coupled together in a skip-K pattern. Each switch from the first and second sets of switches is coupled to the resistor string, and the first and second sets of switches are each arranged in a sequence and are offset from one another by an offset value. The first and second sets of switches are arranged along the periphery of the array such that each switch from the first set of switches is located in proximity to and is associated with the same row or the same column as its corresponding switch in the sequence from the second set of switches.
    Type: Application
    Filed: November 8, 2011
    Publication date: May 9, 2013
    Applicant: Texas Instruments Incorporated
    Inventors: Ralph G. Oberhuber, Tsedeniya A. Abraham, Mark Shill
  • Patent number: 6150971
    Abstract: A digital-to-analog converter includes a resistive divider network including a plurality of series resistors of resistance R and a plurality of shunt resistors of resistance 2R' and a circuit for switching a shunt resistor of the resistive divider network in the digital-to-analog converter to either of first and second reference voltages. The switching circuit includes a first switch MOSFET coupling the low reference voltage to the shunt resistor, and a second switch MOSFET coupling the shunt resistor to the high reference voltage. First and second switch control circuits adjust the on resistances of the first and second switch MOSFETs to be proportional to the resistances of first and second reference resistors, which have the same temperature coefficient as the resistors of which the divider network is composed. The on resistance of each of the first and second switch MOSFETs is equal to R.sub.ONi, and the resistance 2R' is equal to 2R-R.sub.ONi. The on resistances do not need to be binarily scaled.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: November 21, 2000
    Assignee: Burr-Brown Corporation
    Inventors: Jimmy R. Naylor, Timothy V. Kalthoff, Mark A. Shill, Jeffrey D. Johnson
  • Patent number: 5172019
    Abstract: In an analog-to-digital converter, a circuit for sampling an analog input signal that has a signal range above and below a ground reference voltage includes a divider circuit scaling the analog input signal down to a lower magnitude such that all values of the scaled analog input signal are above the ground reference voltage. The scaled down analog input signal is applied to a source electrode of a sampling MOSFET. A body-to-source voltage of the sampling MOSFET is maintained at approximately zero volts by applying the scaled down signal to a non-inverting input of a first operational amplifier and applying an output voltage produced by the first operational amplifier to its inverting input and a body electrode of the sampling MOSFET. A gate-to-source voltage of the sampling MOSFET is maintained at approximately 1.
    Type: Grant
    Filed: January 17, 1992
    Date of Patent: December 15, 1992
    Assignee: Burr-Brown Corporation
    Inventors: Jimmy R. Naylor, Mark A. Shill