Patents by Inventor Mark A. Webster

Mark A. Webster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12276565
    Abstract: Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: April 15, 2025
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Ravi S. Tummidi, Tony P. Polous, Mark A Webster
  • Publication number: 20250035839
    Abstract: Embodiments herein describe a PSR that includes a rotator with two layers that are separated by a dielectric layer. A first layer of the rotator includes a first waveguide formed from a lower refractive index material (e.g., SiN) while a second layer of the rotator includes a second waveguide formed from a higher refractive index material (e.g., Si). An optical signal, which can include two optical modes (e.g., TE and TM modes), is then introduced into the first layer where the TM mode is rotated. At the end of the rotator, the first waveguide (which is the same waveguide that received the optical signal) includes the optical signal which is now in the same optical mode. That is, one of the optical modes is rotated so that the light is the same type of optical mode (e.g., TE).
    Type: Application
    Filed: July 28, 2023
    Publication date: January 30, 2025
    Inventors: Jean-Luc J. TAMBASCO, Mark A. WEBSTER
  • Publication number: 20240393530
    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Yi Ho LEE, Tao LING, Ravi S. TUMMIDI, Mark A. WEBSTER, Prakash B. GOTHOSKAR
  • Patent number: 12117650
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Grant
    Filed: August 11, 2023
    Date of Patent: October 15, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Shiyi Chen, Tao Ling, Weizhuo Li, Mark A. Webster
  • Publication number: 20240337870
    Abstract: Embodiments herein describe a photonic platform having a chiplet with a Pockels effect electro-optic layer made of LN or BTO and a substrate. The chiplet is bonded to a photonic wafer which includes a waveguide. In this manner, a ridge waveguide formed by the Pockels effect electro-optic layer and the waveguide utilizes electro-optic effects to tune a signal.
    Type: Application
    Filed: April 7, 2023
    Publication date: October 10, 2024
    Inventors: Vipulkumar K. PATEL, Ming Gai Stanley LO, Mark A. WEBSTER, Farnood KHALILZADEH REZAIE
  • Patent number: 12092863
    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.
    Type: Grant
    Filed: October 18, 2021
    Date of Patent: September 17, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Yi Ho Lee, Tao Ling, Ravi S. Tummidi, Mark A. Webster, Prakash B. Gothoskar
  • Publication number: 20240241332
    Abstract: A device and a method of fabricating the device are provided. The device includes an optical modulator formed in a dielectric material, a silicon substrate adjacent the dielectric material, and a metal shield formed in the dielectric material between the optical modulator and the silicon substrate. The metal shield blocks an electromagnetic field of a driving signal of the optical modulator from extending into the silicon substrate.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 18, 2024
    Inventors: Long Chen, Qianfan Xu, Li Chen, Mark A. Webster
  • Patent number: 12035082
    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: July 9, 2024
    Assignee: Cisco Technology, Inc.
    Inventors: Tao Ling, Ravi S. Tummidi, Yi Ho Lee, Mark A. Webster
  • Publication number: 20230384522
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Application
    Filed: August 11, 2023
    Publication date: November 30, 2023
    Inventors: Shiyi CHEN, Tao LING, Weizhuo LI, Mark A. WEBSTER
  • Patent number: 11810877
    Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: November 7, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Mark A. Webster, Craig S. Appel
  • Patent number: 11762150
    Abstract: Embodiments include a fiber to photonic chip coupling system including a collimating lens which collimate a light transmitted from a light source and an optical grating including a plurality of grating sections. The system also includes an optical dispersion element which separates the collimated light from the collimating lens into a plurality of light beams and direct each of the plurality of light beams to a respective section of the plurality of grating sections. Each light beam in the plurality of light beams is diffracted from the optical dispersion element at a different wavelength a light beam of the plurality of light beams is directed to a respective section of the plurality of grating sections at a respective incidence angle based on the wavelength of the light beam of the plurality of light beams to provide optimum grating coupling.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: September 19, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Shiyi Chen, Tao Ling, Weizhuo Li, Mark A. Webster
  • Patent number: 11728622
    Abstract: An optical apparatus comprises a semiconductor substrate and an optical waveguide emitter. The optical waveguide emitter comprises an input waveguide section extending from a facet of the semiconductor substrate, a turning waveguide section optically coupled with the input waveguide section, and an output waveguide section extending to the same facet and optically coupled with the turning waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section comprises an optically active region.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: August 15, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Dominic F. Siriani, Vipulkumar K. Patel, Matthew J. Traverso, Mark A. Webster
  • Publication number: 20230251510
    Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 10, 2023
    Inventors: Alexey V. VERT, Mark A. WEBSTER
  • Publication number: 20230243718
    Abstract: Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.
    Type: Application
    Filed: April 7, 2023
    Publication date: August 3, 2023
    Inventors: Xunyuan ZHANG, Ravi S. TUMMIDI, Tony P. POLOUS, Mark A. WEBSTER
  • Patent number: 11693200
    Abstract: Embodiments herein describe using a double wafer bonding process to form a photonic device. In one embodiment, during the bonding process, an optical element (e.g., a high precision optical element) is optically coupled to an optical device in an active surface layer. In one example, the optical element comprises a nitride layer which can be patterned to form a nitride waveguide, passive optical multiplexer or demultiplexer, or an optical coupler.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: July 4, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Vipulkumar K. Patel, Ravi S. Tummidi, Mark A. Webster
  • Patent number: 11686648
    Abstract: Electrical test of optical components via metal-insulator-semiconductor capacitor structures is provided via a plurality of optical devices including a first material embedded in a second material, wherein each optical device is associated with a different thickness range of a plurality of thickness ranges for the first material; a first capacitance measurement point including the first material embedded in the second material; and a second capacitance measurement point including a region from which the first material has been replaced with the second material.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: June 27, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Ravi S. Tummidi, Tony P. Polous, Mark A. Webster
  • Patent number: 11650439
    Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: May 16, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Alexey V. Vert, Mark A. Webster
  • Publication number: 20230119450
    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Yi Ho LEE, Tao LING, Ravi S. TUMMIDI, Mark A. WEBSTER, Prakash B. GOTHOSKAR
  • Publication number: 20230122662
    Abstract: A grating coupler with a wafer bonded configuration includes: a substrate; an oxide layer disposed on the substrate; a silicon nitride layer disposed above the oxide layer; a first silicon layer disposed above the silicon nitride layer; a second silicon layer disposed above the first silicon layer; and a bi-layer grating disposed above the silicon nitride layer. The bi-layer grating includes (i) a first etched layer of the first silicon layer and (ii) a second etched layer of the second silicon layer.
    Type: Application
    Filed: October 18, 2021
    Publication date: April 20, 2023
    Inventors: Eng Wen ONG, Mark A. WEBSTER
  • Publication number: 20230076009
    Abstract: Process margin relaxation is provided in relation to a compensated-for process via a first optical device, fabricated to satisfy an operational specification when a compensated-for process is within a first tolerance range; a second optical device, fabricated to satisfy the operational specification when the compensated-for process is within second tolerance range, different than the first tolerance range; a first optical switch connected to an input and configured to output an optical signal received from the input to one of the first optical device and the second optical device; and a second optical switch configured to combine outputs from the first optical device and the second optical device.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 9, 2023
    Inventors: Tao LING, Ravi S. TUMMIDI, Yi Ho LEE, Mark A. WEBSTER