Abstract: A method and apparatus for comparing a stored data word to a comparison data word in a magnitude content addressable memory (MCAM). The magnitude comparator receives the data value and a comparison value as inputs, and produces two magnitude signals as outputs. The first magnitude signal indicates whether the comparison value is greater than the data value and the second magnitude signal indicates whether the comparison value is less than the data value. The magnitude comparator also receives magnitude signals from the preceding MCAM cell. The previous magnitude signals are output as the first and second magnitude signals when the data value and the comparison value are equal. The MCAM enables data words of arbitrary length to be compared with comparison words.

Abstract: According to the present invention, entry into the test mode of an integrated circuit device is possible even when there is no device pin dedicated to a test mode function. Test mode control circuitry allows a pin of the integrated circuit device to be double mapped to a normal operation function and to a test mode function. The test mode control circuitry has a polarity circuit having a polarity bond pad and a fuse circuit having a fuse element, either of which may determine when the polarity of the pin is representative of a test mode function. Either down-bonding the polarity bond pad to the lead frame of the integrated circuit device or blowing the fuse renders the pin representative of the test mode function. Additionally, once the test mode of the device is entered, the device may be adequately stress tested.

Abstract: Parallel testing of integrated circuit devices are facilitated such that it is not necessary that integrated circuit devices to be parallel tested be "ends only" devices. A side pad located along the sides, rather than the ends, of the integrated circuit device is electrically connected by multiplexing circuitry to a corresponding configurable probe pad located along the ends of the device. During parallel testing of the device, the side pad is effectively tested when the configurable probe pad is probed and tested. While the configurable probe pad is tested during parallel testing, the side pad is not directly exercised. Following parallel testing, the side pad is bonded to the device package but the configurable probe pad is not bonded to the device package.

Abstract: Parallel testing of integrated circuit devices are facilitated such that it is not necessary that integrated circuit devices to be parallel tested be "ends only" devices. A side pad located along the sides, rather than the ends, of the integrated circuit device is electrically connected by multiplexing circuitry to a corresponding configurable probe pad located along the ends of the device. During parallel testing of the device, the side pad is effectively tested when the configurable probe pad is probed and tested. While the configurable probe pad is tested during parallel testing, the side pad is not directly exercised. Following parallel testing, the side pad is bonded to the device package but the configurable probe pad is not bonded to the device package.