Patents by Inventor Mark Aldo Bordogna

Mark Aldo Bordogna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230344739
    Abstract: Methods, apparatus, systems, and articles of manufacture to generate a timestamp are disclosed. Examples disclosed herein generate a correction factor based on a first timestamp and a second timestamp, the first timestamp generated before a first data packet is obtained by ethernet physical coding sublayer (PCS), the second timestamp generated before the first data packet is obtained by a physical ethernet port coupled to the ethernet PCS; and generate a third timestamp for a second data packet based on the correction factor and a fourth timestamp, the fourth timestamp generated by network interface circuitry for the second data packet.
    Type: Application
    Filed: June 29, 2023
    Publication date: October 26, 2023
    Inventors: Surekha Peri, Mark Aldo Bordogna, Job Abraham, Sankaradithyan Gunasekharan
  • Patent number: 6683855
    Abstract: Memory requirements and processing delays associated with the application of forward error correction in high speed optical transmissions are substantially reduced by mapping a forward error correction code on a row-by-row basis into unused overhead bytes in a high bit rate signal frame. By applying the forward error correction code to an entire row of the signal frame on a row by row basis, approximately one row needs to be stored at a time thereby reducing the total memory requirements for forward error correction processing. Using SONET as an exemplary application, approximately {fraction (1/9)}th of the entire SONET frame (e.g., one of nine rows) needs to be buffered for forward error correction processing. In an illustrative embodiment, four forward error correction (FEC) blocks are provided for each row for a total of 36 FEC blocks for a frame. Each FEC block comprises four bytes of correction bits for a total of 32 correction bits.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: January 27, 2004
    Assignee: Lucent Technologies Inc.
    Inventors: Mark Aldo Bordogna, Ralf Dohmen, Wolfram Sturm
  • Patent number: 6560202
    Abstract: Distributed switch fabrics can support multiple switching functions while meeting established performance requirements by using a control architecture based on multiple layers of signal status carried within signals transported through the distributed switch fabrics. More specifically, a method and apparatus is provided for controlling the selection of signals through distributed switch fabrics by deriving signal status information for the signals at any point along a transmission path and embedding the signal status information in each of the signals using multiple signal status layers. Each of the signals carries its respective signal status information as it propagates along the transmission path, so that the embedded signal status information can be selectively extracted from any of the multiple signal status layers to facilitate a selection decision at any of the distributed switch fabrics.
    Type: Grant
    Filed: July 27, 1998
    Date of Patent: May 6, 2003
    Assignee: Lucent Technologies Inc.
    Inventors: Mark Aldo Bordogna, Philip Sidney Dietz, Joseph Elide Landry, Jeffrey Robert Towne, Warren Clifton Trested, Jr.
  • Patent number: 6301228
    Abstract: A simple, elementary switch fabric is provided for switching individual signals as a composite group based on group signal status that is embedded and carried within each of the individual signals in the group. In general, a group signal status is derived for a group based on the signal status of each of the individual signals within that group. This group signal status is then individually encoded and embedded in each of the individual signals in the group. The embedded group signal status can be extracted and decoded at any point within the transmission path, as necessary, to facilitate appropriate switching decisions. Although each individual signal is switched independently by the elementary switch fabric, the individual signals are effectively switched as a composite group because the switching decision for each individual signal in the group is based on the same group signal status.
    Type: Grant
    Filed: May 29, 1998
    Date of Patent: October 9, 2001
    Assignee: Lucent Technologies, Inc.
    Inventors: Mark Aldo Bordogna, Philip Sidney Dietz, Joseph Elide Landry, Jeffrey Robert Towne, Warren Clifton Trested, Jr.
  • Patent number: 6137790
    Abstract: A system for providing segmented control of a single, homogeneous routing structure, such as a switch fabric, includes application control elements that are each responsive to embedded signal status information for each of the input signals to the switch fabric. Within each of the application control elements, a configurable arrangement of selectors and control logic is used to provide domain segmented control of each of the separate switching functions for a particular application. Each application control element performs an application specific address resolution function to resolve a single address of one of the input signals based on the embedded signal status of each of the input signals. This single address is provided to the switch fabric so that the corresponding input signal can be selected at the switch fabric output.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: October 24, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Mark Aldo Bordogna, Philip Sidney Dietz, Joseph Elide Landry, Jeffrey Robert Towne, Warren Clifton Trested, Jr.
  • Patent number: 6091730
    Abstract: Arrangements for controlling a data switching network fabric and for synchronizing duplicate modules of such a fabric. A control complex, for determining new virtual connections to be established, and for disconnecting existing virtual connections, is connected through data links to the network fabric of a data switch. The network fabric has internal control processors. The control complex communicates with these processors by sending control packets over a dedicated internal ATM link and virtual connections to these internal processors to control their establishment and disconnection of user virtual connections. Duplicate modules of the data switching fabric receive identical packets and, when synchronized, transmit identical packets at the same time. The synchronization process is implemented by data links between the control processors of the duplicate fabrics to report progress on the step by step synchronization of internal queues.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: July 18, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Janus Biegaj, Mark Aldo Bordogna, Mark Henry Davis, Dominic Dominijani, Kurt Arnold Hedlund, Gary Lynn McElvany
  • Patent number: 6091731
    Abstract: Arrangements for controlling a data switching network fabric and for synchronizing duplicate modules of such a fabric. A control complex, for determining new virtual connections to be established, and for disconnecting existing virtual connections, is connected through data links to the network fabric of a data switch. The network fabric has internal control processors. The control complex communicates with these processors by sending control packets over a dedicated internal ATM link and virtual connections to these internal processors to control their establishment and disconnection of user virtual connections. Duplicate modules of the data switching fabric receive identical packets and, when synchronized, transmit identical packets at the same time. The synchronization process is implemented by data links between the control processors of the duplicate fabrics to report progress on the step by step synchronization of internal queues.
    Type: Grant
    Filed: March 30, 1998
    Date of Patent: July 18, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Janus Biegaj, Mark Aldo Bordogna, Mark Henry Davis, Dominic Dominijanni, Kurt Arnold Hedlund, Gary Lynn McElvany
  • Patent number: 6081503
    Abstract: A network element with a centralized switch fabric is able to support multiple switching functions while meeting established performance requirements by using a control system based on an embedded signal status protocol. Generally, each input signal within a transmission path is monitored to derive signal status information, which is then individually encoded and embedded within the input signal. The embedded signal status can be decoded and provided as input to control logic for processing at any point within the transmission path, as necessary. In the case of a centralized switch fabric, the control logic resolves an address of a single input signal based on the embedded signal status and provides this resolved address to the switch fabric so that the appropriate input signal can be selected. In the present invention, the control logic may be configured to support any given application, e.g.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: June 27, 2000
    Assignee: Lucent Technologies Inc.
    Inventors: Mark Aldo Bordogna, Philip Sidney Dietz, Joseph Elide Landry, Jeffrey Robert Towne, Warren Clifton Trested, Jr.