Abstract: Disclosed are apparatus and methods for plasma processing on optical surfaces for anti-reflection (AR) treatments. The present disclosure enables efficient AR treatments and high performance of optical characters of materials having such AR coating. Narrow Gap Plasma Etching and Hollow Cathode Plasma Etching processes are disclosed according to some embodiment of the present invention. In some embodiments, the apparatus and methods are in combination of DC Bias Control to control physical (ion) bombardment and environment of the chamber (pressure and electric power) more closely, thus to control the processing more effectively.

Abstract: Disclosed are apparatus and methods for plasma processing on optical surfaces for anti-reflection (AR) treatments. The present disclosure enables efficient AR treatments and high performance of optical characters of materials having such AR coating. Narrow Gap Plasma Etching and Hollow Cathode Plasma Etching processes are disclosed according to some embodiment of the present invention. In some embodiments, the apparatus and methods are in combination of DC Bias Control to control physical (ion) bombardment and environment of the chamber (pressure and electric power) more closely, thus to control the processing more effectively.

Abstract: System and method for filling vias in integrated circuits A preferred embodiment comprises forming a spacer layer on a substrate, forming a via with walls and a bottom in the spacer layer, depositing a conformal conductive layer on the spacer layer and on the walls and bottom of the via, spinning-on a photo-definable material on the conductive layer, forming a fill layer on the conductive layer and filling the via, exposing portions of the fill layer to an exposing light using a photomask, developing the fill layer to remove select portions of the fill layer and leave a portion of the fill layer filling the via, and removing the spacer layer. The use of a spin-on photo-definable material increases the material's filling and planarizing capabilities, while enabling a reduction in the number of process steps, which may reduce the likelihood of manufacturing defects, thereby increasing manufacturing yield.

Abstract: In accordance with one embodiment of the present disclosure, a method for filling a void of an electromechanical system includes forming a void within a support layer. A conductive layer is formed outwardly from the support layer such that a portion of the conductive layer partially fills the void. A remainder of the void is filled with an inorganic material. A mirror is formed outwardly from the inorganic material and the conductive layer.

Abstract: System and method for filling vias in integrated circuits A preferred embodiment comprises forming a spacer layer on a substrate, forming a via with walls and a bottom in the spacer layer, depositing a conformal conductive layer on the spacer layer and on the walls and bottom of the via, spinning-on a photo-definable material on the conductive layer, forming a fill layer on the conductive layer and filling the via, exposing portions of the fill layer to an exposing light using a photomask, developing the fill layer to remove select portions of the fill layer and leave a portion of the fill layer filling the via, and removing the spacer layer. The use of a spin-on photo-definable material increases the material's filling and planarizing capabilities, while enabling a reduction in the number of process steps, which may reduce the likelihood of manufacturing defects, thereby increasing manufacturing yield.