Abstract: An integrated circuit architecture and test methods for use in designing, fabricating and testing mixed-signal application specific integrated circuits. The architecture comprises a plurality of mixed-signal integrated circuits, bidirectional buffers coupled to the integrated circuits that provide for circuit reconfigurability, a bidirectional digital/analog test bus, and a serial test controller coupled to the buffers that controls normal operation and testing of the integrated circuits. The controller and plurality of buffers cooperate to couple signals from signal pads to the integrated circuits to provide for "normal" operation thereof, and to re-route external test signals applied to selected signal pads to the integrated circuits to permit testing. Logic in the buffers provides for functional configurability, enabling them to be logically altered under control of the controller, and allowing the test bus to be connected directly to signal pads.