Patents by Inventor Mark B. Ritter

Mark B. Ritter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240320531
    Abstract: A computer-implemented method, according to one approach, includes receiving at least one set of qubits at a first client component, and using the at least one set of qubits to index a configuration dictionary to determine a first configuration. The configuration dictionary defines a plurality of different configurations. The method further includes causing the first client component to be configured according to the first configuration. A computer program product, according to another approach, includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and/or executable by a first client component to cause the first client component to perform the foregoing method. A system, according to another approach, includes a processor, and logic integrated with the processor, executable by the processor, or integrated with and executable by the processor. The logic is configured to perform the foregoing method.
    Type: Application
    Filed: March 24, 2023
    Publication date: September 26, 2024
    Inventors: Utpal Mangla, Paridhi Verma, Gerald Coon, Satishkumar Sadagopan, Mark B. Ritter, Mudhakar Srivatsa, Mathews Thomas, Dinesh C. Verma
  • Publication number: 20240322915
    Abstract: Embodiments are related to improving the bandwidth of classical networks using quantum networks. Sender equipment transfers quantum bits over a quantum communications network to receiver equipment, the quantum bits being used to obtain entry values in a shared dictionary. The sender equipment determines a solution for an optimization problem using the entry values, where data to be transferred over a telecommunications network is expressed by the optimization problem. The sender equipment transfers the solution over the telecommunications network to the receiver equipment, where an equivalence of the data is transferred to the receiver equipment in response to the receiver equipment using the solution, the optimization problem, and the entry values to obtain the data.
    Type: Application
    Filed: March 20, 2023
    Publication date: September 26, 2024
    Inventors: Dinesh C. Verma, Gerald Coon, Satishkumar Sadagopan, Mudhakar Srivatsa, Mathews Thomas, Utpal Mangla, Paridhi Verma, Mark B. Ritter
  • Patent number: 12026584
    Abstract: A qubit control system for a quantum computer includes an optical waveguide configured to receive and transmit therethrough a wavelength division multiplexed optical signal which has a plurality of modulated optical carriers, each optical carrier being at a different optical wavelength and carrying a digital qubit control signal; an optical demultiplexer optically coupled to the optical waveguide to receive the multiplexed optical signal to recover the plurality of modulated optical carriers; a plurality of photodetectors in communication with the optical demultiplexer; a plurality of cryogenic filters in communication with the plurality of photodetectors, each being configured to filter corresponding one of the plurality of digital qubit control signals to provide a corresponding one of a plurality of analog qubit control signals which is directed to a corresponding superconducting qubit and the photodetectors. The cryogenic filters are provided at a cryogenic temperature.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: July 2, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark B. Ritter, Jason S. Orcutt, Patryk Gumann
  • Publication number: 20220156619
    Abstract: A qubit control system for a quantum computer includes an optical waveguide configured to receive and transmit therethrough a wavelength division multiplexed optical signal which has a plurality of modulated optical carriers, each optical carrier being at a different optical wavelength and carrying a digital qubit control signal; an optical demultiplexer optically coupled to the optical waveguide to receive the multiplexed optical signal to recover the plurality of modulated optical carriers; a plurality of photodetectors in communication with the optical demultiplexer; a plurality of cryogenic filters in communication with the plurality of photodetectors, each being configured to filter corresponding one of the plurality of digital qubit control signals to provide a corresponding one of a plurality of analog qubit control signals which is directed to a corresponding superconducting qubit and the photodetectors. The cryogenic filters are provided at a cryogenic temperature.
    Type: Application
    Filed: November 17, 2020
    Publication date: May 19, 2022
    Inventors: Mark B. Ritter, Jason S. Orcutt, Patryk Gumann
  • Patent number: 11308390
    Abstract: Embodiments include methods and systems of neuron leaky integrate and fire circuit (NLIFC). Aspects include: receiving an input current having both AC component and DC component at an input terminal of the NLIFC, extracting AC component of input current, generating a number of swing voltages at a swing node using extracted AC component of the input current, transferring charge from a pull-up node to a neuron membrane potential (NP) node through an integration diode and a pull-up diode to raise a voltage at NP node over an integration capacitor gradually and the voltage at NP node shows integration value of AC component of input current, implementing leaky decay function of the neuron leaky integrate and fire circuit, detecting a timing of neuron fire using an analog comparator, resetting a neuron membrane potential level for a refractory period after neuron fire, and generating fire output signal of the NLIFC.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: April 19, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark B. Ritter, Takeo Yasuda
  • Patent number: 11201686
    Abstract: A qubit control system for a quantum computer includes a source of a plurality optical carriers; an optical modulator to receive the plurality optical carriers and to modulate each optical carrier with a qubit control signal to provide a plurality of modulated optical signals; an optical multiplexer to provide a wavelength division multiplexed optical signal; an optical waveguide to receive and transmit the wavelength division multiplexed optical signal therethrough; an optical demultiplexer to receive the wavelength division multiplexed optical signal to recover each of the plurality of modulated optical signals; a demodulator to receive each of the recovered plurality of modulated optical signals to output a corresponding plurality of recovered qubit control signals to control subsets of a plurality of qubits.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: December 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark B. Ritter, Jason S. Orcutt, Patryk Gumann
  • Patent number: 10671911
    Abstract: Embodiments are directed to a driver circuit including a first amplifier having a voltage follower configured to control a first node to maintain a voltage of the first node at a constant value. By maintaining the first node voltage, the first amplifier having the voltage follower is further configured to have a first amplifier output current into the first node at a value without the effect of the voltage fluctuation. The driver circuit further includes a second amplifier configured to control a second node, wherein the second amplifier is in a current mirror configuration with respect to the first amplifier such that a second amplifier current output is a highly precise mirror of the first amplifier current output.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark B. Ritter, Takeo Yasuda
  • Patent number: 10643125
    Abstract: Embodiments include methods and systems of neuron leaky integrate and fire circuit (NLIFC). Aspects include: receiving an input current having both AC component and DC component at an input terminal of the NLIFC, extracting AC component of input current, generating a number of swing voltages at a swing node using extracted AC component of the input current, transferring charge from a pull-up node to a neuron membrane potential (NP) node through an integration diode and a pull-up diode to raise a voltage at NP node over an integration capacitor gradually and the voltage at NP node shows integration value of AC component of input current, implementing leaky decay function of the neuron leaky integrate and fire circuit, detecting a timing of neuron fire using an analog comparator, resetting a neuron membrane potential level for a refractory period after neuron fire, and generating fire output signal of the NLIFC.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: May 5, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mark B. Ritter, Takeo Yasuda
  • Publication number: 20200026994
    Abstract: Embodiments include methods and systems of neuron leaky integrate and fire circuit (NLIFC). Aspects include: receiving an input current having both AC component and DC component at an input terminal of the NLIFC, extracting AC component of input current, generating a number of swing voltages at a swing node using extracted AC component of the input current, transferring charge from a pull-up node to a neuron membrane potential (NP) node through an integration diode and a pull-up diode to raise a voltage at NP node over an integration capacitor gradually and the voltage at NP node shows integration value of AC component of input current, implementing leaky decay function of the neuron leaky integrate and fire circuit, detecting a timing of neuron fire using an analog comparator, resetting a neuron membrane potential level for a refractory period after neuron fire, and generating fire output signal of the NLIFC.
    Type: Application
    Filed: September 26, 2019
    Publication date: January 23, 2020
    Inventors: Mark B. Ritter, Takeo Yasuda
  • Patent number: 9793913
    Abstract: A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: October 17, 2017
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Mark B. Ketchen, Christopher B. Lirakis, Alexey Y. Lvov, Stanislav Polonsky, Mark B. Ritter
  • Publication number: 20170255860
    Abstract: Embodiments include methods and systems of neuron leaky integrate and fire circuit (NLIFC). Aspects include: receiving an input current having both AC component and DC component at an input terminal of the NLIFC, extracting AC component of input current, generating a number of swing voltages at a swing node using extracted AC component of the input current, transferring charge from a pull-up node to a neuron membrane potential (NP) node through an integration diode and a pull-up diode to raise a voltage at NP node over an integration capacitor gradually and the voltage at NP node shows integration value of AC component of input current, implementing leaky decay function of the neuron leaky integrate and fire circuit, detecting a timing of neuron fire using an analog comparator, resetting a neuron membrane potential level for a refractory period after neuron fire, and generating fire output signal of the NLIFC.
    Type: Application
    Filed: March 3, 2016
    Publication date: September 7, 2017
    Inventors: Mark B. Ritter, Takeo Yasuda
  • Publication number: 20170243108
    Abstract: Embodiments are directed to a driver circuit including a first amplifier having a voltage follower configured to control a first node to maintain a voltage of the first node at a constant value. By maintaining the first node voltage, the first amplifier having the voltage follower is further configured to have a first amplifier output current into the first node at a value without the effect of the voltage fluctuation. The driver circuit further includes a second amplifier configured to control a second node, wherein the second amplifier is in a current mirror configuration with respect to the first amplifier such that a second amplifier current output is a highly precise mirror of the first amplifier current output.
    Type: Application
    Filed: February 19, 2016
    Publication date: August 24, 2017
    Inventors: Mark B. Ritter, Takeo Yasuda
  • Publication number: 20170179973
    Abstract: A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.
    Type: Application
    Filed: February 20, 2017
    Publication date: June 22, 2017
    Inventors: John F. Bulzacchelli, Mark B. Ketchen, Christopher B. Lirakis, Alexey Y. Lvov, Stanislav Polonsky, Mark B. Ritter
  • Patent number: 9614532
    Abstract: A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: April 4, 2017
    Assignee: International Business Machines Corporation
    Inventors: John F. Bulzacchelli, Mark B. Ketchen, Christopher B. Lirakis, Alexey Y. Lvov, Stanislav Polonsky, Mark B. Ritter
  • Publication number: 20170047914
    Abstract: A pulse generator and a method of fabricating a pulse generator are described. The pulse generator includes an input node to receive an input voltage, a first capacitor, and a second capacitor. The first capacitor is positioned between the input node and the second capacitor. An output node outputs an output voltage with a pulse shape, and the pulse generator also includes at least one switch between the input node and the second capacitor. The at least one switch controls the pulse shape of the output voltage.
    Type: Application
    Filed: August 12, 2015
    Publication date: February 16, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Mark B. Ritter, Takeo Yasuda
  • Publication number: 20170047911
    Abstract: A pulse generator and a method of fabricating a pulse generator are described. The pulse generator includes an input node to receive an input voltage, a first capacitor, and a second capacitor. The first capacitor is positioned between the input node and the second capacitor. An output node outputs an output voltage with a pulse shape, and the pulse generator also includes at least one switch between the input node and the second capacitor. The at least one switch controls the pulse shape of the output voltage.
    Type: Application
    Filed: November 23, 2015
    Publication date: February 16, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Mark B. Ritter, Takeo Yasuda
  • Patent number: 9203022
    Abstract: A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: December 1, 2015
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Marinus J. Hopstaken, Jeehwan Kim, Seyoung Kim, Mark B. Ritter
  • Publication number: 20150243888
    Abstract: A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.
    Type: Application
    Filed: May 12, 2015
    Publication date: August 27, 2015
    Inventors: Marinus J. Hopstaken, Jeehwan Kim, Seyoung Kim, Mark B. Ritter
  • Patent number: 8949685
    Abstract: Techniques are disclosed for minimizing the effects of soft errors associated with memory devices that are individually accessible. By way of example, a method of organizing a column in a memory array of a memory device protected by an error correction code comprises the step of maximizing a distance of the error correction code by maximizing a physical distance between memory bits associated with a memory line within the column protected by the error correction code. Other soft error protection techniques may include use of a feed forward error correction code or use of a memory operation (e.g., read or write operation) suppress and retry approach.
    Type: Grant
    Filed: January 27, 2010
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Douglas J. Joseph, Mark B. Ritter, José A. Tierno
  • Publication number: 20150028279
    Abstract: A resistive switching device includes a first electrode and a transition metal oxide layer formed on the first electrode. An oxygen scavenging electrode is formed on the transition metal oxide wherein the oxygen scavenging electrode removes oxygen from the transition metal oxide layer to increase formation of oxygen vacancies in the transition metal oxide layer to enable a switching mode when a bias is applied between the first electrode and the oxygen scavenging electrode.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 29, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Marinus J. Hopstaken, Jeehwan Kim, Seyoung Kim, Mark B. Ritter