Patents by Inventor Mark B. Soffa

Mark B. Soffa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4759073
    Abstract: A wire bonding apparatus and method incorporating a pattern recognition system wherein there is stored, in a teach mode, signatures representing a pre-determined point on a chip to be bonded, the signatures being obtained at respective 90.degree. locations of the pedestal which carries the chip. Automatic re-calibration provides for rotating the pedestal to each of four 90.degree. apart spaced angles and finding the respective recorded signatures and the corresponding positions, and calculating the true center of rotation as a function of the four positions thus found. A specialized algorithm is used for correcting error which may be introduced if the chip is not rotated at precisely 90.degree. intervals during the process of finding the respective signatures. The system carries out re-calibration automatically every N packages bonded.
    Type: Grant
    Filed: November 15, 1985
    Date of Patent: July 19, 1988
    Assignee: Kulicke & Soffa Industries, Inc.
    Inventors: Gautam N. Shah, Mark B. Soffa, Mansur F. Pagdiwala, Thomas F. Schueller, George M. Berkin, Asuri S. Raghavan
  • Patent number: 4619395
    Abstract: The present invention provides a new and improved workstation for holding a semiconductor device opposite the bonding tool of an automatic wire bonder during a bonding operation. The workstation is mounted on a retractable pedestal which is vertically and rotationally movable by a high speed vertical axis drive motor and a high speed theta drive motor which are mounted on a workstation base in fixed positions and coupled to said pedestal for imparting motion thereto. The movable pedestal and workstation are adapted to unload a semiconductor device from a boat or holder and accurately position the top of the semiconductor device at a predetermined bonding height opposite the bonding tool.
    Type: Grant
    Filed: October 4, 1985
    Date of Patent: October 28, 1986
    Assignee: Kulicke and Soffa Industries, Inc.
    Inventors: Vincent G. Amorosi, Gautam N. Shah, Mark B. Soffa, David A. Leonhardt, Gary L. Gillman
  • Patent number: 4327860
    Abstract: Electrodes and lead-out terminals of semiconductor devices employ fine wire interconnections which require forming into a predetermined configuration. The method of the present invention provides several novel steps in a sequence of steps which causes the interconnection wire to be shaped in an extremely desirable configuration free of slack. The method is characterized by first preforming a portion of the wire in a direction opposite the direction of the desired interconnection and subsequently reforming the preformed portion of wire while the remainder of the interconnection wire is being formed in tension.
    Type: Grant
    Filed: January 3, 1980
    Date of Patent: May 4, 1982
    Assignee: Kulicke and Soffa Ind. Inc.
    Inventors: Zeev Kirshenboin, Mark B. Soffa