Abstract: A method and apparatus that allows egress pointer smoothing data by evaluating the average fill of an elastic store. For one embodiment of the invention, by measuring the average fill, the 3 bytes of SOH and 87 bytes of data are taken together in each sample, and the relative phase of ingress and egress frames does not impact the fill depth calculation. For one such embodiment, the calculation is performed by summing the elastic store fill over a full row and increment/decrement decisions based on that average figure provide smooth rate of pointers coming out even as a section overhead moves through the frame.

Abstract: A method and apparatus that allows egress pointer smoothing data by evaluating the average fill of an elastic store. For one embodiment of the invention, an elastic store implements a plurality of independent FIFOs, each FIFO having a write pointer and a read pointer, the write pointer including a marking pointer field and valid flag field. An incoming byte is received to a location within a traffic memory and the write pointer is used to instruct the traffic memory to indicate that the incoming bit has been received to the location. The valid flag field is set to indicate that the value at the location is currently valid.

Abstract: A method and system for providing single stage pointer and overhead processing is disclosed. In accordance with one embodiment of the invention, data including bytes of each of multiple types of overhead data is received at a logical element of a communications network. The logical element includes a labeler to label the bytes of each of the multiple types of overhead data and a pointer processor to read the labeled bytes and perform specific operations corresponding to the label, wherein the bytes of at least one type of overhead data are labeled based on feedback provided by the pointer processor to the labeler.

Abstract: A method and system for providing single stage pointer and overhead processing is disclosed. In accordance with one embodiment of the invention, data including bytes of each of multiple types of overhead data is received at a logical element of a communications network. The logical element includes a labeler to label the bytes of each of the multiple types of overhead data and a pointer processor to read the labeled bytes and perform specific operations corresponding to the label, wherein the bytes of at least one type of overhead data are labeled based on feedback provided by the pointer processor to the labeler.

Abstract: A system for internally monitoring an integrated circuit, wherein the contents of memory locations in the integrated circuit can be displayed on a dedicated display unit via a graphical interface device provided in the integrated circuit. The system provides a built-in means for observing the internal state of both firmware and hardware (as applicable) on the integrated circuit device. This facilitates the development of, and ongoing health monitoring of, the device in any system into which it may be incorporated. The provision of a graphical interface device provides a relatively high bandwidth for the outgoing data and so allows the internal state of the device to be monitored in real time.

Abstract: Described are a system and method of communicating status and protection information between cards in a communications system. The system has a plurality of cards connected to a backplane. The plurality of cards includes a tributary card and a cross-connect card for forwarding data traffic between cards in the network element. The backplane has a link that is dedicated to carrying out-of-band signals between the tributary card and the cross-connect card. The tributary card transmits information to the cross-connect card in a first out-of-band signal over the link and the cross-connect card broadcasts the information to the plurality of cards in the network element in a second out-of-band signal.

Abstract: The phase of a pulsed test signal is measured with reference to a reference signal of constant frequency by sampling the test signal at times determined by transitions in the reference signal and comparing the sampled test signal with the output of a phase accumulator clocked by the reference signal. A resulting measurement signal represents a difference in the number of transitions occurring in the sampled test signal and a reference state signal output by the phase accumulator. The measurement signal may be averaged and integrated to obtain an error signal which may then be filtered to provide a control signal for an oscillator. A digital frequency synthesizer is provided by frequency dividing the output of the oscillator by a constant multiple to obtain the test signal and integrating an offset signal in addition to the averaged measurement signal so that the operating frequency of the oscillator is offset from a nominal frequency by an amount determined by the offset signal.