Abstract: A channel estimation method for a digital telecommunication station is disclosed. A frequency correction burst is sought by scanning of the wanted channel. The frequency correction burst is used to provide coarse time and frequency synchronizations. A synchronization burst is received. Calculating the cross-correlation of the expected training sequence with the training sequence contained in said synchronous burst to obtain a channel estimate. A frequency error estimate is derived from the channel estimate, and the frequency error of the received burst is corrected in accordance with said frequency error estimate. The received synchronous burst is equalized. The frequency corrected symbols are used to refine the time and frequency synchronizations.

Abstract: A software simulation technique for pipelined hardware is provided in which the hardware is modelled as a plurality of pipelined circuit element models that each respectively read their input data values from a first data storage area A and write their output data values to a second data storage area B. At the end of each simulated clock signal cycle, the first data storage area A and the second data storage area B are swapped to effectively replicate the behavior of the passing of signal values between pipelined stages in a hardware pipeline.

Abstract: A first model (10), such as a architectural level model or an instruction set simulator model makes calls to a second model (12), such as a pipeline simulator for a data processing device returning cycle count or energy consumption values. The calls to the second model are relatively slow. The system stalls the returned behavioural characteristics from the second model (12) in a memo table (14) and when a sufficient number of these have been returned with sufficiently little variation between them, then they are marked as being valid for use in place of a call to the second model (12), thus speeding up modelling.

Abstract: The present invention relates to a system and methodology facilitating automation security in a networked-based industrial controller environment. Various components, systems and methodologies are provided to facilitate varying levels of automation security in accordance with security analysis tools, security validation tools and/or security learning systems. The security analysis tool receives abstract factory models or descriptions for input and generates an output that can include security guidelines, components, topologies, procedures, rules, policies, and the like for deployment in an automation security network. The validation tools are operative in the automation security network, wherein the tools perform security checking and/or auditing functions, for example, to determine if security components are in place and/or in suitable working order.

Abstract: Stimulation signals (22) are applied to a first circuit model (20) and the power behaviour of the circuit being modelled is determined from the behaviour of the first circuit model (20). In parallel, the same stimulation signals (22) are applied to a second circuit model (26) and the state variable changes within that second circuit model are calculated. The calculated power behaviour and the calculated state variable changes are then applied as training data inputs to a self learning power model, such as a neural network (28), which learns the relationship between state variable changes between the second model (26) and power behaviour of the circuit being simulated. In this way, a detailed first circuit model (20) may be used to calculate power behaviour and to train a separate power model (28, 30) which once trained can be publicly released without having to release sensitive information within the first circuit model (20).

Abstract: A received frame is provided to a first decoder and a first time reverse unit. The first decoder decodes the provided frame and outputs the decoded frame. The first time reverse unit reverses bits of the provided frame in time direction and outputs the time reversed frame. The time reversed frame is provided to a second decoder. The second decoder decodes the time reversed frame. This decoded frame is then provided to a second time reverse unit. The second time reverse unit reverses bits of the decoded frame in time direction and outputs the frame. The frame is outputted from the first decoder is compared with the frame is outputted from the second time reverse unit by comparator. If any difference exist between the two frames then the received frame is judged as unreliable.

Abstract: A method of improving frame erasure performance, in particular for slow frequency hopping channels with cyclic co-channel interference, by selection of the most suitable PBER threshold from a range of PBER thresholds. A burst quality metric is assigned to each burst in a frame and the bursts are then ranked in the order of the values of the assigned quality metrics. The differences in the metrics between successive bursts in the ranked order are measured. The position in the ranked order of the largest difference between bursts (dMAX) is used in the selection of the most suitable PBER threshold.

Abstract: The present invention provides a system for updating mobile distance determination units on a golf course that includes a first mobile unit that determines a new location for a point-of-interest defined for a golf course. The first mobile unit wirelessly transmits update data to identify the new location to a base station computer. The base station computer processes the updated data for broadcasting to activated second mobile distance determination units. The base station computer then wirelessly broadcasts the updated data from the base station computer to the second mobile distance determination units. The second mobile distance determination units update their point-of-interest location data and use this updated data to determine distances between the second mobile distance determination units and the new locations.

Abstract: A method of improving frame erasure performance for slow frequency hopping channels utilizing two convolutional decoding steps and two PBER thresholds in conjunction with the cyclic redundancy check. The breakdown condition in the convolutional decoding process is detected by means of a ‘forward backward decoding’ algorithm. The breakdown condition is detected with two passes of the convolutional decoder. When the decoder breaks down an essentially random burst of erroneous decoded bits are produced, and due to the memory effect of the decoder these will be different in each decoding direction. These erroneous random errors may be detected by comparison of the two decoded sets of data.

Abstract: A software simulation technique for pipelined hardware is provided in which the hardware is modelled as a plurality of pipelined circuit element models that each respectively read their input data values from a first data storage area A and write their output data values to a second data storage area B. At the end of each simulated clock signal cycle, the first data storage area A and the second data storage area B are swapped to effectively replicate the behavior of the passing of signal values between pipelined stages in a hardware pipeline.

Abstract: The thickness of a thin layer structure is monitored during deposition or etching. The structure is illuminated with a predetermined energy (visible or near visible light or x-ray) and a modified parameter of the illumination is measured, which may be reflection intensity, transmission intensity or polarisation. The detected signal is examined by shape recognition techniques using adaptive digital filters.

Abstract: A twist-on or wire-nut electrical connector having a rigid, electrically insulative upper body, a flexible, elastic, electrically insulative lower skirt, and a coil spring within the body for gripping wires which may be inserted therein. The provision of a flexible, elastic skirt allows the insertion of a larger number of wires (or larger sized wires) into the connector; the skirt further deforms to fit more easily within a crowded junction box or other high-density wiring environment. Unlike prior art twist-on connectors, the lower skirt is attached directly to the open end of the polymeric body, allowing greater application of torque to the rigid body. In the preferred embodiment, the upper body is formed of polypropylene, the lower skirt is formed of a styrenebutylene compound or an olefinic thermoplastic vulcanizate, and the connector is constructed by multicomponent injection molding.