Abstract: For use in a data storage system, a method of dynamically controlling accesses to and from the storage device array.

Abstract: An apparatus and method for workload balancing along multiple communication paths to a plurality of devices. The apparatus includes a controller that accumulates path usage information and a path balancing device that makes use of the accumulated path usage information to perform a path balancing operation. The path balancing method involves the path balancing device calculating the total expected connect time for all I/O messages issued to each of a plurality of peripheral devices during a predefined sampling period. These totals are then added for each communication path for the sampling period to obtain path totals. The path totals are then compared to see if a difference between the highest used path and the lowest used path is greater than a threshold amount. If the difference is higher than the threshold amount, the peripheral device having a total expected connect time that is closest to a target value is moved from the highest used path to the lowest used path.

Abstract: An apparatus and method for workload balancing along multiple communication paths to a plurality of devices. The apparatus includes a controller that accumulates path usage information and a path balancing device that makes use of the accumulated path usage information to perform a path balancing operation. The path balancing method involves the path balancing device calculating the total expected connect time for all I/O messages issued to each of a plurality of peripheral devices during a predefined sampling period. These totals are then added for each communication path for the sampling period to obtain path totals. The path totals are then compared to see if a difference between the highest used path and the lowest used path is greater than a threshold amount. If the difference is higher than the threshold amount, the peripheral device having a total expected connect time that is closest to a target value is moved from the highest used path to the lowest used path.

Abstract: An apparatus and method for workload balancing along multiple communication paths to a plurality of devices. The apparatus includes a controller that accumulates path usage information and a path balancing device that makes use of the accumulated path usage information to perform a path balancing operation. The path balancing method involves the path balancing device calculating the total expected connect time for all I/O messages issued to each of a plurality of peripheral devices during a predefined sampling period. These totals are then added for each communication path for the sampling period to obtain path totals. The path totals are then compared to see if a difference between the highest used path and the lowest used path is greater than a threshold amount. If the difference is higher than the threshold amount, the peripheral device having a total expected connect time that is closest to a target value is moved from the highest used path to the lowest used path.

Abstract: A direct access storage device (DASD) controller system for serves computer elements such as processors and disk arrays through a serial interconnect scheme. The system includes a plurality of adapters belonging to either a first set or a second set. Cache memory is divided into master memory cards and slave memory cards, each slave memory card in communication with a corresponding master memory card. A plurality of bidirectional multichannel serial data links connects one adapter with one memory card such that every adapter in the first set of adapters is connected to every master memory card and such that every adapter in the second set of adapters is connected to every slave memory card.

Abstract: A multi-port switching system and method for a computer bus allows for selective coupling of a number of bus initiator devices to at least one bus target device to simulate a dual-ported interface to the bus target device. By use of a number of switching circuits corresponding with the bus initiator busses, a single-ported bus target device may be utilized in applications where dual-ported or greater interfaces are required. The multi-port switching system and method utilizes a low-cost hardware based design which adds minimal overhead to the operation of the computer bus.