Patents by Inventor Mark C. J. C. M. Kramer

Mark C. J. C. M. Kramer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Gringo heterojunction bipolar transistor with a metal extrinsic base region
    Patent number: 9041149
    Abstract: The invention relates to a semiconductor device (30) comprising a substrate (1), a semiconductor body (25) comprising a bipolar transistor that comprises a collector region (3), a base region (4), and an emitter region (15), wherein at least a portion of the collector region (3) is surrounded by a first isolation region (2, 8), the semiconductor body (25) further comprises an extrinsic base region (35) arranged in contacting manner to the base region (4). In this way, a fast semiconductor device with reduced impact of parasitic components is obtained.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: May 26, 2015
    Assignee: NXP, B.V.
    Inventors: Guillaume Boccardi, Mark C. J. C. M. Kramer, Johannes J. T. M. Donkers, Li Jen Choi, Stefaan Decoutere, Arturo Sibaja-Hernandez, Stefaan Van Huylenbroeck, Rafael Venegas
  • Semiconductor device and method of manufacture thereof
    Patent number: 8541812
    Abstract: A semiconductor device (10) comprising a bipolar transistor and a field effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22d and 22e) and a base region (33d) of the bipolar transistor. The bipolar transistor is provided with a first insulating cavity (92) provided in the collector region (22d and 22e). The base region (33d) is narrower in the plane of the substrate than the collector region (22d and 22e) due to a second insulating cavity (94) provided around the base region (33d) and between the collector region (22d and 22e) and the emitter region (4). By blocking diffusion from the base region the first insulating cavity (92) provides a reduction in the base collector capacitance and can be described as defining the base contact.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 24, 2013
    Assignee: NXP B.V.
    Inventors: Philippe Meunier-Beillard, Mark C. J. C. M. Kramer, Johannes J. T. M. Donkers, Guillaume Boccardi
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20110215417
    Abstract: A semiconductor device (10) comprising a bipolar transistor and a field effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a collector region (22d and 22e) and a base region (33d) of the bipolar transistor. The bipolar transistor is provided with a first insulating cavity (92) provided in the collector region (22d and 22e). The base region (33d) is narrower in the plane of the substrate than the collector region (22d and 22e) due to a second insulating cavity (94) provided around the base region (33d) and between the collector region (22d and 22e) and the emitter region (4). By blocking diffusion from the base region the first insulating cavity (92) provides a reduction in the base collector capacitance and can be described as defining the base contact.
    Type: Application
    Filed: February 26, 2009
    Publication date: September 8, 2011
    Applicant: NXP B.V.
    Inventors: Philippe Meunier-Beillard, Mark C.J.C.M. Kramer, Johannes J.T.M. Donkers, Guillaume Boccardi
  • GRINGO HETEROJUNCTION BIPOLAR TRANSISTOR WITH A METAL EXTRINSIC BASE REGION
    Publication number: 20110198671
    Abstract: The invention relates to a semiconductor device (30) comprising a substrate (1), a semiconductor body (25) comprising a bipolar transistor that comprises a collector region (3), a base region (4), and an emitter region (15), wherein at least a portion of the collector region (3) is surrounded by a first isolation region (2, 8), the semiconductor body (25) further comprises an extrinsic base region (35) arranged in contacting manner to the base region (4). In this way, a fast semiconductor device with reduced impact of parasitic components is obtained.
    Type: Application
    Filed: August 5, 2009
    Publication date: August 18, 2011
    Applicants: NXP B.V., INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW
    Inventors: Guillaume Boccardi, Mark C. J. C. M. Kramer, Johannes J. T. M. Donkers, Li Jen Choi, Stefaan Decoutere, Arturo Sibaja-Hernandez, Stefaan Van Huylenbroeck, Rafael Venegas