Abstract: An example solenoidal inductor includes a core including an inner circumference and an outer circumference, a first end cap and a second end cap, a plurality of spacer layers between the first end cap and the second end cap, and a plurality of intermediate layers including a plurality of outer intermediate layers and a plurality of inner intermediate layers. The plurality of intermediate layers are positioned between the plurality of spacer layers. The solenoidal inductor further includes a solenoidal winding wound around the plurality of inner intermediate layers with a plurality of turns, where each turn is axially shifted with respect to an axis of symmetry.

Abstract: An example power converter includes a first coaxial capacitor array located proximally to an input cable connected to the power converter, a second coaxial capacitor array located proximally to an output cable connected to the power converter, a coaxial semiconductor package coupled between the first capacitor array and the second capacitor array, where the coaxial semiconductor package is configured to convert a first voltage on the input cable to a second voltage on the output cable, and a coaxial inductor coupled to the second coaxial capacitor array.

Abstract: Various embodiments related to coaxial semiconductor packages are described. In an example embodiment, a coaxial semiconductor package is comprised of a pair of stacked, annular, metal contacts, with a circular arrangement of switching transistors between the annular contacts, and where the switching transistors can be arranged concentrically with and electrically coupled to the metal, annular contacts. A gate interconnect can be configured with a coaxial electrical interconnect passing through the metal, annular contacts, and interfaced with a gate and a source of a switching transistor. Multiple coaxial semiconductor packages can be arranged concentrically, nested within one another, for bridge switch configurations, or stacked for series connected or back-to-back switch configurations.

Abstract: A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.

Abstract: A number of different sealed interfaces for power modules are described. In one example, a sealed interface includes a printed circuit board including a contact pad for power conduction to a bus bar of the printed circuit board, a semiconductor module including at least one power transistor, a terminal pin electrically coupled to the power module, and a housing for the power module. The housing includes an open terminal aperture that extends through the housing. The printed circuit board is seated upon the open terminal aperture, to close and seal the open terminal aperture, with the contact pad positioned within the open terminal aperture. The terminal pin contacts the contact pad of the printed circuit board within the open terminal aperture, and the open terminal aperture comprises a transitional feature to abate electric field intensity around an interface between the open terminal aperture and the printed circuit board.