Abstract: The invention provides new heteroaromatic compounds having the general formula (I?), or a solvate or a pharmaceutically acceptable salt thereof, wherein R1, R2, R3, R4, R5, R6, Y1, Y2, Y3, and n are as defined herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The present invention is directed to a plaster composition with a reduced carbon footprint and a method of making and using such plaster composition. In one aspect, the plaster composition may include a workability composition and a binder. When hydrated with water, a hydrated plaster composition may have enhanced workability, enhanced surface texture, enhanced finish, and may have a reduced carbon footprint as compared to a traditional plaster composition.

Abstract: The invention provides new bicyclopentanyl compounds having the general formula (I), or a solvate or a pharmaceutically acceptable salt thereof: wherein R1, R2, R3, R4, and R5 are as defined herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The invention provides new heterocyclic compounds having the general formula (I?), or a solvate or a pharmaceutically acceptable salt thereof: wherein R1, R2, R3, R4, R5, R6, R7 and R8 are as defined herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: The invention provides new heterocyclic compounds having the general formula (I), or a solvate or a pharmaceutically acceptable salt thereof: wherein R1, R2, R3, R4, R5, R6 and n are as defined herein, compositions including the compounds, processes of manufacturing the compounds and methods of using the compounds.

Abstract: Methods and systems for performing post clock tree synthesis (CTS) of a clock tree include accessing, from memory, an integrated circuit design comprising a clock tree interconnecting a clock source to a plurality of clock sinks. Each clock sink has an associated current insertion delay. A mean insertion delay of the plurality of clock sinks is determined based on the associated current insertion delays of the clock sinks. A target insertion delay for the clock sinks is set based on the mean insertion delay and a target insertion delay adjustment determined for each individual clock sink. One or more clock sinks are identified that have a target insertion delay adjustment exceeding a skew threshold value. The clock tree is modified to reduce the target insertion delay adjustment, for each identified clock sink of the one or more clock sinks, to less than or equal to the skew threshold value.

Abstract: Various embodiments provide a system for performing operations that comprise accessing an integrated circuit design that includes a clock tree interconnecting a clock source to a plurality of clock sinks. The operations include receiving a request to adjust a present timing offset of the clock tree to a target timing offset. In response, a group of clock sinks to be adjusted are identified to satisfy the request. The clock tree is then modified by moving a terminal of the group from a first location in the clock tree to a second location in the clock tree to update the clock tree. An indication is provided that the updated clock tree has been modified and complies with the target timing offset.

Abstract: A system for performing operations including accessing an integrated circuit design that includes a clock tree interconnecting a clock source to a plurality of clock sinks. The operations include receiving a request to adjust a current timing offset of the clock tree to a target timing offset. The clock tree is modified by moving a terminal of the group from a first location in the clock tree to a second location in the clock tree to generate an updated clock tree. During modification, the first and second locations are analyzed to determine a load reduction and increase at the respective terminals. One or more neighboring clock tree instances are adjusted to compensate for the load reduction and increase. The operations include providing an indication that the clock tree has been updated and complies with the target timing offset.

Abstract: An aircraft includes the aircraft component. The aircraft component includes an outer skin portion, a plurality of major stiffeners, and a plurality of minor stiffeners. The outer skin portion has an interior side and an exterior side configured to define an exterior boundary of the aircraft. The major stiffeners are integral with the outer skin portion and extend out from the interior side. The major stiffeners are configured to resist global deflection of the aircraft component in response to a bird strike on the aircraft component. The minor stiffeners are disposed between the major stiffeners, are integral with the outer skin portion, and extend out from the interior side. The minor stiffeners are configured to resist perforation of the aircraft component in response to the bird strike on the aircraft component.

Abstract: Aspects of the present disclosure address systems and methods for fixing clock tree design constraint violations. An initial clock tree is generated. The generating of the initial clock tree comprises routing a clock net using an initial value for a parameter that controls a priority ratio between total route length and a maximum source-to-sink route length in each net of the clock tree. A violation to a clock tree design constraint is detected in the clock net in the clock tree, and based on detecting the violation, a rerouting candidate is generated by rerouting the clock net using an adjusted value for the parameter. A target clock tree is selected based on a comparison of timing characteristics of the rerouting candidate with the clock tree design constraint.

Abstract: Aspects of the present disclosure address improved systems and methods for runtime efficient circuit placement location selection as described herein. An example embodiment includes identifying, for each route of the one or more routes that interconnect the terminals of a circuit design with the one or more pins of a first circuit element, a corresponding set of movement positions along said each route to generate a set of movement configurations for the first circuit element. The set of movement configurations is analyzed to generate a plurality of location clusters from the set of movement configurations, and for each location cluster of the plurality of location clusters, identifying one or more selected movement configurations within said each cluster. The one or more selected movement configurations for said each cluster to select an updated movement configuration.

Abstract: Electronic design automation systems, methods, and media are presented for clock gate placement with data path awareness. One embodiment involves accessing a circuit design with a clock tree, clock gates, and an initial movement area. A set of positions for a set of data path connection points associated with the data routing lines are identified, along with an expansion direction from the initial placement position toward the set of positions for the set of data path connection points, and the initial movement is expanded to consider additional placement options for the clock gate based on the data path connection points.

Abstract: A composite reinforcement structure including a first skin having a first end and a second end and a second skin having a first end and a second end. The first end of the first skin and the first end of the second skin are coupled. A corrugated spar is disposed between the first skin and the second skin and is bonded to the first skin and the second skin.

Abstract: Aspects of the present disclosure address improved systems and methods for core-route-based clock tree wirelength reduction. A method may include accessing an integrated circuit design comprising a clock tree comprising routes that interconnect terminals of a plurality of clock tree instances. The method further includes identifying a core route in the clock tree. The method further includes determining a first offset based on a distance between the first terminal and the core route and determining a second offset based on a distance from the second terminal to the core route. The method further includes determining a target offset based on a combination of the first and second offsets and moving the clock tree instance toward the core route by the target offset.

Abstract: Aspects of the present disclosure address systems and methods for shortening clock tree wirelength based on target offsets in connected routes. A method may include accessing a clock tree comprising routes that interconnect a plurality of pins. Each pin corresponds to a terminal of a clock tree instance. The method further includes identifying a first and second terminal of a clock tree instance in the clock tree. The method further includes determining a first offset based on a distance between the first terminal and a branch in a first route connected to the first terminal and determining a second offset based on a distance between the second terminal and a branch in a second route connected to the second terminal. The method further includes moving the clock tree instance from a first location to a second location based on a target offset determined by comparing the first and second offsets.

Abstract: Aligned carbon nanotube are synthesized using an electric potential generated by a thermocouple and strips of first and second materials. The first and second materials have different chemical compositions, and include at least one of an oxide and a metal. A catalyst is deposited on and/or around the materials, and can also be deposited on the substrate. The substrate is exposed to the electric potential in the presence of a carbon-containing gas during chemical vapor deposition. This causes carbon nanotubes to grow from the catalyst, in alignment with the electric potential.

Abstract: The present invention discloses compositions and methods for generating engineered catalysts and synthesizing semiconducting single wall carbon nanotubes using the catalysts Carbon nanotubes (CNTs). The CNTS are either metallic or semiconducting, with diameters controlled by an engineered catalyst to selectively synthesizes the semiconducting CNT. The engineered catalyst consists of two types of metals, a high melting point metal and an active transition metal. Each of the metals remains solid state during a growth of semiconducting CNTs, and each is present as nanoparticles, having sizes between 0.5 nm and 10 nm. The ratio of the high melting point metal with respect to the active transition metal is preferably between 1:0.25 and 1:10.

Abstract: Aircraft components and aircraft are provided. An aircraft includes the aircraft component. The aircraft component includes an outer skin portion, a plurality of major stiffeners, and a plurality of minor stiffeners. The outer skin portion has an interior side and an exterior side configured to define an exterior boundary of the aircraft. The major stiffeners are integral with the outer skin portion and extend out from the interior side. The major stiffeners are configured to resist global deflection of the aircraft component in response to a bird strike on the aircraft component. The minor stiffeners are disposed between the major stiffeners, are integral with the outer skin portion, and extend out from the interior side. The minor stiffeners are configured to resist perforation of the aircraft component in response to the bird strike on the aircraft component.

Abstract: Provided is a process for recovering metals from solid radioactive waste, preferably uranium, cesium, mercury, thorium, rare earths or combinations thereof. The process comprises a leaching step and a separation step. The leaching step comprises contacting the solid radioactive waste with an aqueous inorganic acid and a leaching salt to produce a mixture of a metal-rich leachate and a metal-poor waste, which are separated in the separation step. Also provided is a process for recovering metals from solid radioactive waste comprising an attrition step, a leaching step, a washing step, a combination step and a recovery step.