Abstract: A probe assembly is provided and includes a probe card, an interposer body disposed on a surface of the probe card, probe pins arranged in a grouping and extending from the interposer body away from the probe card, each probe pin including an elongate element and a tip at a distal end of the elongate element, a mold supportable on the interposer body to fit around the grouping of the probe pins and non-conductive elastic material introduced into and cured within an interior region defined by the mold to surround at least the elongate element of each probe pin.

Abstract: A first host device housing is provided with a host device and first peripherals. The host device includes a motherboard and an upper core Input/Output (I/O) control board connected to the motherboard within the host device housing. A non-host device housing includes second peripherals and a lower core I/O control board. The host device housing is removably attachable to the non-host device housing to form a modular terminal. The second peripherals are interfaced to the host device through a cable that connects the lower core I/O control board to the upper core I/O control board. Combinations of the host device housing and a selected non-host device housing form different configurations of a modular terminal. Features available to a given configuration of the modular terminal are driven by the first peripherals and the second peripherals.

Abstract: A semiconductor testing device includes a test head including one or more probe heads, and one or more electrical connectors, a heating/cooling unit configured to spread and remove heat within at least one device of one or more devices under test, a handler wafer, and a fixture configured to support the handler wafer. The semiconductor testing device is configured to power up at least one device of the one or more devices under test during testing.

Abstract: A testing device includes N devices, and N?1 probe heads. N is an integer. An M-th probe head includes devices 1 to N-M electrically connected to each other. The M-th probe head is configured to test the M-th device, and M is an integer between 1 and N?1.

Abstract: A semiconductor test structure includes a first surface comprising a plurality of first conductive contacts spaced apart from each other at a first pitch, and a second surface located opposite the first surface and comprising a plurality of second conductive contacts spaced apart from each other at a second pitch. The second pitch is less than the first pitch, and respective ones of the plurality of first conductive contacts are electrically connected to one or more respective ones of the plurality of second conductive contacts.

Abstract: A base self-service terminal (SST) system comprises a host device and a first set of peripherals. The base SST system can operate in standalone mode to process self-service transactions when the base SST system is placed on a horizontal surface or mounted to a pedestal. The base SST system processes the self-service transactions utilizing the first set of peripherals and a second set of peripherals when the base SST system is docked within an integrated peripheral device or a peripheral bridge appliance. The integrated peripheral device comprises the second set of peripherals or the second set of peripherals are made available through the peripheral bridge appliance. One or more additional peripherals are attachable and removable from the base SST system and one or more accessory modules are attachable and removable from the base SST system, the integrated peripheral device, and/or the peripheral bridge appliance.

Abstract: A first host device housing is provided with a host device and first peripherals. The host device includes a motherboard and an upper core Input/Output (I/O) control board connected to the motherboard within the host device housing. A non-host device housing includes second peripherals and a lower core I/O control board. The host device housing is removably attachable to the non-host device housing to form a modular terminal. The second peripherals are interfaced to the host device through a cable that connects the lower core I/O control board to the upper core I/O control board. Combinations of the host device housing and a selected non-host device housing form different configurations of a modular terminal. Features available to a given configuration of the modular terminal are driven by the first peripherals and the second peripherals.

Abstract: A high-velocity scanned item distribution apparatus and method are presented. The high-velocity scanned item distribution apparatus permits bagging operations for multiple purchase transactions to occur in parallel. Overlapping the bagging operation of multiple purchase transactions allows the scanning and payment operations of the purchase transactions to continue at higher speeds. In addition, point of sale terminals with high-velocity item scanners are allowed to function at higher speeds.

Abstract: A high-velocity scanned item distribution apparatus and method are presented. The high-velocity scanned item distribution apparatus permits bagging operations for multiple purchase transactions to occur in parallel. Overlapping the bagging operation of multiple purchase transactions allows the scanning and payment operations of the purchase transactions to continue at higher speeds. In addition, point of sale terminals with high-velocity item scanners are allowed to function at higher speeds.