Abstract: A local clock buffer for improved energy efficiency using a power saving micro-gating clock buffer includes a grid node configured to receive a global clock signal from a global clock grid; an enable gate configured to output a master enable signal based on respective values of two or more enable signals; an enable signal capture latch configured to store a value of the master enable signal; a clock gate configured to output, in dependence upon the stored value of the master enable signal, a pulsed clock signal based on the global clock signal; and micro-gating logic configured to: receive the pulsed clock signal and the two or more enable signals; and output two or more local clock signals using the pulsed clock signal, wherein each local clock signal is selectively output based on a value of one of the two or more enable signals.

Abstract: Configuring a fault-sensing ring oscillator circuit is disclosed. In a particular embodiment, a fault-sensing ring oscillator circuit includes a plurality of ring oscillators; an enable circuit configured to enable and disable the plurality of ring oscillators; an OR circuit including a plurality of inputs, wherein each input is coupled to a respective ring oscillator of the plurality of ring oscillators; and a first fault detection latch including a SET input coupled to a first output of the OR circuit and a RESET input coupled to the enable circuit, wherein the first fault detection latch indicates a stuck at fault condition when the plurality of ring oscillators are disabled by the enable circuit and at least one of the plurality of ring oscillators is active.

Abstract: Embodiments include exerciser device placement in the development of an integrated circuit. Aspects of the invention include obtaining a design of an integrated circuit and creating a dynamic power blockage map for the integrated circuit. Aspects also include updating the integrated circuit design by placing one or more exercisers on the integrated circuit, wherein a location of the one or more exercisers on the integrated circuit is based on at least in part on the dynamic power blockage map. Based on a determination that the updated integrated circuit design complies with one or more design constraints, aspects further include outputting the updated integrated circuit design.

Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.

Abstract: The method and systems described herein provide for identifying and mitigating undesirable power or voltage fluctuations in regions of a semiconductor device. For example, embodiments include detecting a region, such as an individual processor, of a processor chip is exhibiting a reduced power draw and a resulting localized voltage spike (e.g., a spike that exceeds Vmax) that would accelerate overall device end-of-life (EOL). The described systems respond by activating circuits or current generators located in the given region to draw additional power via a protective current. The protective current lowers the local voltages spikes back to within some pre-specified range (e.g., below a Vmax). The resulting reduction in the time above Vmax in testing reduces the number of devices that will need to be discarded due to Vmax violations as well as increases the expected reliability and lifespan of the device in operation.