Patents by Inventor Mark Cope

Mark Cope has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260067138
    Abstract: Aspects of this disclosure relate to squelching a symbol at a symbol boundary. A transmit squelch block can squelch a portion of a symbol at a symbol boundary. The transmit squelch block can be included in a symbol based envelope tracking system. Transmit squelching can reduce spurious emissions associated a symbol based envelope tracking voltage toggling on a symbol boundary.
    Type: Application
    Filed: September 5, 2024
    Publication date: March 5, 2026
    Inventor: Mark Cope
  • Patent number: 12451913
    Abstract: Systems and methods for compensating a transmit signal for charge trapping effects of a power amplifier are provided. In certain embodiments, a non-linear filter is trained based on time aligning a first set of observations taken from digital transmit data prior to conversion to a radio frequency transmit signal, and a second set of observations taken from an output of a power amplifier that amplifies the radio frequency transmit signal. In certain implementations, the first set of observations and the second set of observations are obtained without decimation. Rather, decimation is provided after timing alignment. By implementing the DPD system in this manner, signal data is not lost by decimation and more accurate timing alignment between the sets of observations is achieved.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: October 21, 2025
    Assignee: Analog Devices International Unlimited Company
    Inventors: Patrick Pratt, Dong Chen, Mark Cope, Christopher Mayer, Praveen Chandrasekaran, Stephen Summerfield, Naveen Naraharisetti
  • Publication number: 20250293641
    Abstract: Aspects of this disclosure relate to methods of drive signal extraction for driving a pseudo-Doherty load modulated balanced amplifier, related circuitry to generate the drive signals, and related systems that include pseudo-Doherty load modulated balanced amplifiers. Methods can include generating test signal for a pseudo-Doherty load modulated balanced amplifier and estimating efficiency of the pseudo-Doherty load modulated balanced amplifier. The efficiency can be estimated based on an observed radio frequency signal and/or output signals from one or more current sensors associated with the pseudo-Doherty load modulated balanced amplifier. A digital splitter can be set based the estimated efficiency of the pseudo-Doherty load modulated balanced amplifier. The digital splitter can provide two or more drive signals to the pseudo-Doherty load modulated balanced amplifier.
    Type: Application
    Filed: June 20, 2024
    Publication date: September 18, 2025
    Inventors: William Henry Thompson, Mark Cope, Noureddine Outaleb, Anis Ben Arfi
  • Publication number: 20250293640
    Abstract: Aspects of this disclosure relate to a multi-stage pseudo-Doherty load modulated balanced amplifier that includes a control stage and balanced stages. The balanced stages can each include a balanced amplifier biased in class C. The balanced stages can each include an output coupler having a port driven by another stage of the multi-stage pseudo-Doherty load modulated balanced amplifier. In certain embodiments, two or more stages of the multi-stage pseudo-Doherty load modulated balanced amplifier are driven by separate drive signals.
    Type: Application
    Filed: June 20, 2024
    Publication date: September 18, 2025
    Inventors: William Henry Thompson, Mark Cope, Noureddine Outaleb, Anis Ben Arfi
  • Patent number: 12328106
    Abstract: Various examples are directed to a circuit for biasing a power amplifier (PA). The circuit may comprise a first isolated power supply comprising a first DC output and a first common output as well as a second isolated power supply comprising a second DC output and a second common output. The second DC output may be electrically coupled to the first common output. The circuit may also comprise a switch network that is configurable to a first state in which the first DC output is provided at a circuit output and to a second state in which the second DC output is provided at the circuit output.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: June 10, 2025
    Assignee: Analog Devices International Unlimited Company
    Inventors: Qingyi Huang, Yong Zhang, Mark Cope, Bernhard Strzalkowski
  • Patent number: 12231143
    Abstract: Radio transmitters providing an analog signal with both radio frequency (RF) and baseband frequency information are disclosed herein. In certain embodiments, a transmitter for an RF communication system includes a radio frequency digital-to-analog converter (RFDAC) that outputs the analog signal with two bands of content. In particular, the analog signal includes a first band on content at RF frequency and representing the RF signal for transmission, and a second band of content at baseband frequency and representing baseband information such as the envelope of the RF signal.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: February 18, 2025
    Assignee: Analog Devices International Unlimited Company
    Inventors: Mark Cope, Antonio Montalvo
  • Publication number: 20250015769
    Abstract: Aspects of this disclosure relate to symbol based envelope tracking. A voltage modulator circuit can generate an output bias voltage that tracks a root mean square symbol power of a radio frequency signal. A crest factor reduction circuit in a signal path that provides the radio frequency signal can adjust a crest factor reduction threshold such that the crest factor reduction threshold corresponds to the output bias voltage.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 9, 2025
    Inventors: Mark Cope, Yong Zhang, Alexander Robert Arnold, Shipra Bhal
  • Publication number: 20250015762
    Abstract: Aspects of this disclosure relate to symbol based envelope tracking. A voltage modulator circuit can generate an output bias voltage that tracks a root mean square symbol power of a radio frequency signal. A digital predistortion system in a signal path that provides the radio frequency signal can adjust a digital predistortion based on a symbol based envelope tracking state.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 9, 2025
    Inventors: Mark Cope, Yong Zhang, Alexander Robert Arnold, Shipra Bhal
  • Publication number: 20240283474
    Abstract: Systems and methods for compensating a transmit signal for charge trapping effects of a power amplifier are provided. In certain embodiments, a non-linear filter is trained based on time aligning a first set of observations taken from digital transmit data prior to conversion to a radio frequency transmit signal, and a second set of observations taken from an output of a power amplifier that amplifies the radio frequency transmit signal. In certain implementations, the first set of observations and the second set of observations are obtained without decimation. Rather, decimation is provided after timing alignment. By implementing the DPD system in this manner, signal data is not lost by decimation and more accurate timing alignment between the sets of observations is achieved.
    Type: Application
    Filed: June 8, 2022
    Publication date: August 22, 2024
    Inventors: Patrick Pratt, Dong Chen, Mark Cope, Christopher Mayer, Praveen Chandrasekaran, Stephen Summerfield, Naveen Naraharisetti
  • Patent number: 12024922
    Abstract: A lock indicator and a mechanical lock assembly, comprising: a switch; a transmitter coupled to a power source; and a bolt member moveable between a retracted position and an extended position with respect to the housing, wherein the switch is configured to engage the bolt member and is actuatable by the bolt member to determine the position of the bolt member, and the transmitter is configured to transmit a signal indicative of the position of the bolt member to a remote device.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: July 2, 2024
    Assignee: AVANTIS HARDWARE LIMITED
    Inventors: Ryan Bromley, Mark Cope
  • Publication number: 20230361731
    Abstract: Various examples are directed to a circuit for biasing a power amplifier (PA). The circuit may comprise a first isolated power supply comprising a first DC output and a first common output as well as a second isolated power supply comprising a second DC output and a second common output. The second DC output may be electrically coupled to the first common output. The circuit may also comprise a switch network that is configurable to a first state in which the first DC output is provided at a circuit output and to a second state in which the second DC output is provided at the circuit output.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Inventors: Qingyi Huang, Yong Zhang, Mark Cope, Bernhard Strzalkowski
  • Publication number: 20230179222
    Abstract: Radio transmitters providing an analog signal with both radio frequency (RF) and baseband frequency information are disclosed herein. In certain embodiments, a transmitter for an RF communication system includes a radio frequency digital-to-analog converter (RFDAC) that outputs the analog signal with two bands of content. In particular, the analog signal includes a first band on content at RF frequency and representing the RF signal for transmission, and a second band of content at baseband frequency and representing baseband information such as the envelope of the RF signal.
    Type: Application
    Filed: November 22, 2022
    Publication date: June 8, 2023
    Inventors: Mark Cope, Antonio Montalvo
  • Patent number: 11533070
    Abstract: Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: December 20, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Patrick Joseph Pratt, Dong Chen, Mark Cope, Christopher Mayer, Praveen Chandrasekaran, Stephen Summerfield
  • Publication number: 20220372792
    Abstract: A lock indicator and a mechanical lock assembly, comprising: a switch; a transmitter coupled to a power source; and a bolt member moveable between a retracted position and an extended position with respect to the housing, wherein the switch is configured to engage the bolt member and is actuatable by the bolt member to determine the position of the bolt member, and the transmitter is configured to transmit a signal indicative of the position of the bolt member to a remote device.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 24, 2022
    Inventors: Ryan Bromley, Mark Cope
  • Patent number: 11387790
    Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: July 12, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Mark Cope, Patrick Joseph Pratt
  • Patent number: 11339588
    Abstract: A lock indicator and a mechanical lock assembly, comprising: a switch; a transmitter coupled to a power source; and a bolt member moveable between a retracted position and an extended position with respect to the housing, wherein the switch is configured to engage the bolt member and is actuatable by the bolt member to determine the position of the bolt member, and the transmitter is configured to transmit a signal indicative of the position of the bolt member to a remote device.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: May 24, 2022
    Inventors: Ryan Bromley, Mark Cope
  • Publication number: 20210194521
    Abstract: Some embodiments herein describe a radio frequency power semiconductor device that include a first non-linear filter network for compensating for lower frequency noise of a power amplifier. The first non-linear filter network can include a plurality of infinite impulse response filters and corresponding corrective elements to correct for a non-linear portion of the power amplifier. The radio frequency power semiconductor device can further include a second non-linear filter network for compensating for broadband distortion. The second non-linear filter network can be connected in parallel to the first non-linear filter network. The broadband distortion can include digital predistortion and the narrowband distortion can include charge trapping effects. The first non-linear filter network can comprise Laguerre filters. The second non-linear filter network can comprise general memory polynomial filters.
    Type: Application
    Filed: November 16, 2020
    Publication date: June 24, 2021
    Inventors: Patrick Joseph Pratt, Dong Chen, Mark Cope, Christopher Mayer, Praveen Chandrasekaran, Stephen Summerfield
  • Publication number: 20200244232
    Abstract: The disclosed technology relates generally to semiconductor devices, and more particularly to power semiconductor devices in which effects of charge trapping are compensated. A radio frequency (RF) power transmitter system comprises a RF power semiconductor device that outputs a time-varying gain characteristic from a RF signal input waveform originating from a digital input, wherein the time-varying gain characteristic includes a gain error associated with charge-trapping events having a memory effect on the RF power semiconductor device lasting longer than 1 microsecond. The RF power transmitter system further comprises circuitry configured to apply an analog gate bias waveform to the RF power semiconductor device based on the time-varying gain characteristic to reduce the gain error.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 30, 2020
    Inventors: Mark Cope, Patrick Joseph Pratt
  • Publication number: 20200131803
    Abstract: A lock indicator and a mechanical lock assembly, comprising: a switch; a transmitter coupled to a power source; and a bolt member moveable between a retracted position and an extended position with respect to the housing, wherein the switch is configured to engage the bolt member and is actuatable by the bolt member to determine the position of the bolt member, and the transmitter is configured to transmit a signal indicative of the position of the bolt member to a remote device.
    Type: Application
    Filed: May 31, 2018
    Publication date: April 30, 2020
    Inventors: Ryan Bromley, Mark Cope
  • Patent number: 8073385
    Abstract: An adaptive echo cancellation system and method employing an algorithm suitable for a digital repeater with sub-band filtering is disclosed. Cross- and auto-correlation measurements used to estimate the residual coupling are computed from normalized cross and power spectrums which avoid the problems associated with narrow bandwidth signal components. The normalized cross- and power spectra are additionally masked in frequency to reduce the influence of interfering spectral components outside of the passband of the sub-band filter. Regularization of the iterative estimation process is applied to maintain stability and compensate for the bandwidth reduction associated with the sub-band filter and the spectral mask.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: December 6, 2011
    Assignee: Powerwave Technologies, Inc.
    Inventors: Richard Neil Braithwaite, Scott Carichner, Mark Cope