Abstract: A timing circuit for implementation in a medical imaging system such as a PET scanner, and a method of ascribing times to events in such systems, is disclosed. In one embodiment, the timing circuit includes a quadrature clock, four counter elements, four status circuits, and four output registers. The clock provides four differently-phased clock signals at a single frequency, and the four counter elements respectively receive the clock signals and provide count signals. The four status circuits all receive an event detection signal and further receive the respective clock signals, and in response provide four status signals indicative of whether the event detection signal has experienced a status change. The four output registers receive the respective clock, status and count signals, and in response provide four output signals that are collectively indicative of a time at which the event detection signal experiences the status change.

Abstract: A timing circuit for implementation in a medical imaging system such as a PET scanner, and a method of ascribing times to events in such systems, is disclosed. In one embodiment, the timing circuit includes a quadrature clock, four counter elements, four status circuits, and four output registers. The clock provides four differently-phased clock signals at a single frequency, and the four counter elements respectively receive the clock signals and provide count signals. The four status circuits all receive an event detection signal and further receive the respective clock signals, and in response provide four status signals indicative of whether the event detection signal has experienced a status change. The four output registers receive the respective clock, status and count signals, and in response provide four output signals that are collectively indicative of a time at which the event detection signal experiences the status change.