Abstract: A mechanism is provided for automating capacity upgrade on demand. Responsive to a usage of an originally allocated resource exceeding an upper predetermined threshold, access to an additional resource is temporarily allocated. A trial time counter is initiated to track a time of access to the additional resource. A user of the logical partition is alerted that the additional resource is being accessed. Responsive to the user failing to license the additional resource, a determination is made as to whether a value of the trial time counter has exceeded a predetermined trial time period value. Responsive to the value of the trial time counter exceeding the predetermined trial time period value, access to the additional resource is deactivated.

Abstract: A mechanism is provide for automating capacity upgrade on demand. Responsive to a usage of an originally allocated resource exceeding an upper predetermined threshold, access to an additional resource is temporarily allocated. A trial time counter is initiated to track a time of access to the additional resource. A user of the logical partition is alerted that the additional resource is being accessed. Responsive to the user failing to license the additional resource, a determination is made as to whether a value of the trial time counter has exceeded a predetermined trial time period value. Responsive to the value of the trial time counter exceeding the predetermined trial time period value, access to the additional resource is deactivated.

Abstract: A mechanism is provided for automating capacity upgrade on demand. Responsive to a usage of an originally allocated resource exceeding an upper predetermined threshold, access to an additional resource is temporarily allocated. A trial time counter is initiated to track a time of access to the additional resource. A user of the logical partition is alerted that the additional resource is being accessed. Responsive to the user failing to license the additional resource, a determination is made as to whether a value of the trial time counter has exceeded a predetermined trial time period value. Responsive to the value of the trial time counter exceeding the predetermined trial time period value, access to the additional resource is deactivated.

Abstract: A method, system, and computer program product for non-interrupting performance tuning using runtime reset are provided in the illustrative embodiments. Component performance data from a component of a data processing system is analyzed. The component participates in processing a workload of a workload type. The analyzing determines a characteristic of the workload. A performance requirement of the workload is determined according to a performance requirement of the workload type. A set of preferred performance tuning parameter values is identified to apply to the component to meet the performance requirement of the workload. The set of preferred performance tuning parameter values is sent to the component such that the component is tuned using a value in the set of preferred performance tuning parameter values to meet the performance requirement of the workload.

Abstract: A system, method and computer program product for avoiding a processing flaw in a computer processor triggered by a predetermined sequence of hardware events. The system may include a detecting unit and a power-on reset unit. The detecting unit detects that the predetermined sequence of hardware events is going to occur at the computer processor. The power-on reset unit initializes the computer processor to a state stored in computer memory in response to detecting the sequence of hardware events.

Abstract: A mechanism is provide for automating capacity upgrade on demand. Responsive to a usage of an originally allocated resource exceeding an upper predetermined threshold, access to an additional resource is temporarily allocated. A trial time counter is initiated to track a time of access to the additional resource. A user of the logical partition is alerted that the additional resource is being accessed. Responsive to the user failing to license the additional resource, a determination is made as to whether a value of the trial time counter has exceeded a predetermined trial time period value. Responsive to the value of the trial time counter exceeding the predetermined trial time period value, access to the additional resource is deactivated.

Abstract: A system, method and computer program product for avoiding a processing flaw in a computer processor triggered by a predetermined sequence of hardware events. The system may include a detecting unit and a power-on reset unit. The detecting unit detects that the predetermined sequence of hardware events is going to occur at the computer processor. The power-on reset unit initializes the computer processor to a state stored in computer memory in response to detecting the sequence of hardware events.

Abstract: A method, system, and computer program product for non-interrupting performance tuning using runtime reset are provided in the illustrative embodiments. Component performance data from a component of a data processing system is analyzed. The component participates in processing a workload of a workload type. The analyzing determines a characteristic of the workload. A performance requirement of the workload is determined according to a performance requirement of the workload type. A set of preferred performance tuning parameter values is identified to apply to the component to meet the performance requirement of the workload. The set of preferred performance tuning parameter values is sent to the component such that the component is tuned using a value in the set of preferred performance tuning parameter values to meet the performance requirement of the workload.

Abstract: A mechanism is provided for saving power in redundant service processors of the data processing system. A redundant service processor places a plurality of components into a low power state in response to receiving a primary control signal from a primary service processor within a first predetermined time period. The redundant service processor monitors for a signal within a second predetermined time period from the primary service processor. The redundant service processor determines whether the signal is a heartbeat signal or an activate signal in response to receiving the signal from the primary service processor within the second predetermined time period. Responsive to receiving the activate signal, the redundant service processor wakes-up the plurality of components that are in the low-power state in order for the redundant service processor to collect data and recover the data processing system in an event of a failure.

Abstract: A mechanism is provided for saving power in redundant service processors of the data processing system. A redundant service processor places a plurality of components into a low power state in response to receiving a primary control signal from a primary service processor within a first predetermined time period. The redundant service processor monitors for a signal within a second predetermined time period from the primary service processor. The redundant service processor determines whether the signal is a heartbeat signal or an activate signal in response to receiving the signal from the primary service processor within the second predetermined time period. Responsive to receiving the activate signal, the redundant service processor wakes-up the plurality of components that are in the low-power state in order for the redundant service processor to collect data and recover the data processing system in an event of a failure.

Abstract: A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. When a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.

Abstract: A mechanism is provided for increased availability of input/output (I/O) drawers during concurrent I/O hub repair. The illustrative embodiments provide an alternative cabling scheme between an I/O planar and a plurality of I/O hubs that facilitates the I/O drawers being available even when an I/O hub fails. With this cabling scheme, a hypervisor or other virtualization mechanism configures routing tables in the firmware of the host system to cause data to be sent/received through the I/O hubs. In the event of a failure of an I/O hub, the routing tables may be updated by the hypervisor to utilize a different I/O hub coupled to the I/O drawer. By virtue of the modified cabling scheme of the illustrative embodiments, such updating of the routing tables allows I/O operations to continue at a single loop, or single barrel, throughput via the other I/O hub.

Abstract: A redundant service processor configuration is provided. A first processor in a first node operates elements in the first node. A first control line connects the first processor to a first multiplexer in the first node. A second processor in a second node operates elements in the second node. A second control line connects the second processor to a second multiplexer in the second node. The first control line from the first processor connects to the second multiplexer. The second control line from the second processor connects to the first multiplexer. In response to a failure of the second processor, the first processor operates the first multiplexer to initialize the elements of the first node, the second processor is switched off, and the first processor operates the second multiplexer to initialize the elements of the second node. Analogous operations occur in response to a failure of the first processor.

Abstract: A method for recovering from software and/or hardware failures occurred in a data processing system is disclosed. A current version of boot code and an updated version of boot code are stored in a first memory region and a second memory region, respectively, of a non-volatile memory of the data processing system. The updated version of boot code is periodically replaced by a latest version of boot code downloaded from a support center. After an occurrence of a system crash, a determination is made if the system crash was caused by a known problem that can be remedied by the updated version of boot code. If so, the data processing system is rebooted using the updated version of boot code. Otherwise, data related to the system crash is collected, and the data processing system is rebooted using the current version of boot code.

Abstract: A multi-chip module (MCM) assembly has two modules interconnected by respective interposers and a printed circuit board, and diagnostic logic within the modules uses the principal of signal reflection to located any open fault in the circuit path across the interposers. A first test signal is sent from module to the other and a determination is made as to whether any reflected signal represents an open fault of the circuit path at either of the interposers. If a reflected signal is received during a predetermined time, the diagnostic logic concludes that a single open fault exists only at the far interposer. If no reflected signal is received then the diagnostic logic concludes that there is at least one open fault at the near interposer, and the second module runs a similar test to check to see if both interposers have failures.

Abstract: A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. when a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.

Abstract: A method for recovering from software and/or hardware failures occurred in a data processing system is disclosed. A current version of boot code and an updated version of boot code are stored in a first memory region and a second memory region, respectively, of a non-volatile memory of the data processing system. The updated version of boot code is periodically replaced by a latest version of boot code downloaded from a support center. After an occurrence of a system crash, a determination is made if the system crash was caused by a known problem that can be remedied by the updated version of boot code. If so, the data processing system is rebooted using the updated version of boot code. Otherwise, data related to the system crash is collected, and the data processing system is rebooted using the current version of boot code.

Abstract: A redundant service processor configuration is provided. A first processor in a first node operates elements in the first node. A first control line connects the first processor to a first multiplexer in the first node. A second processor in a second node operates elements in the second node. A second control line connects the second processor to a second multiplexer in the second node. The first control line from the first processor connects to the second multiplexer. The second control line from the second processor connects to the first multiplexer. In response to a failure of the second processor, the first processor operates the first multiplexer to initialize the elements of the first node, the second processor is switched off, and the first processor operates the second multiplexer to initialize the elements of the second node. Analogous operations occur in response to a failure of the first processor.

Abstract: Mechanisms are provided for performing capacity upgrade on-demand operations for input/output(I/O) adapters of a data processing device. The mechanisms involve providing a data processing device with additional I/O adapters in excess of current I/O capacity requirements of an owner/user of the data processing device. These additional I/O adapters remain in an inactive state after booting of the data processing device until they are specifically activated by the owner/user. Although inactive, memory resources are reserved for the address translation data structures for these inactive I/O adapters. The owner/user may, at a later time, obtain an activation code from a provider of the data processing device and enter the activation code into a hardware management console to thereby activate the additional I/O adapters. The reserved memory resources are then utilized to initialize the address translation data structures for these now active I/O adapters.

Abstract: A multi-chip module (MCM) assembly has two modules interconnected by respective interposers and a printed circuit board, and diagnostic logic within the modules uses the principal of signal reflection to located any open fault in the circuit path across the interposers. A first test signal is sent from module to the other and a determination is made as to whether any reflected signal represents an open fault of the circuit path at either of the interposers. If a reflected signal is received during a predetermined time, the diagnostic logic concludes that a single open fault exists only at the far interposer. If no reflected signal is received then the diagnostic logic concludes that there is at least one open fault at the near interposer, and the second module runs a similar test to check to see if both interposers have failures.