Abstract: A computer system and computer implemented method for deriving constraints with which to direct automatic integrated circuit layout is disclosed. The present invention is particularly adapted for use in the design of large integrated circuits with complex synchronous timing behavior. Preferably, the invented computer system includes means for storing a netlist data structure within a storage means is provided, the netlist data structure representing a circuit configuration having a plurality of circuit elements and representing static timing information for the circuit configuration; means for selecting specified circuit elements to be used for generating the layout constraints, whereby the specified circuit elements that are selected are fewer than, i.e.