Abstract: This invention relates to the preparation of N-(phosphonomethyl)glycine (“glyphosate”) from N-(phosphonomethyl)iminodiacetic acid (“PMIDA”), and more particularly to methods for control of the conversion of PMIDA, for the identification of reaction end points relating to PMIDA conversion and the preparation of glyphosate products having controlled PMIDA content.

Abstract: A system and method for balancing flows of renal replacement fluid is disclosed. The method uses pressure controls and pressure sensing devices to more precisely meter and balance the flow of fresh dialysate and spent dialysate. The balancing system may use one or two balancing devices, such as a balance tube, a tortuous path, or a balance chamber.

Abstract: A method of operating a virtual memory manager (VMM) in a computing system is provided. The method includes receiving a boot-up instruction, determining an amount of available configurable memory, determining a system logical memory block (LMB) size and selecting a memory stripe size for memory stripes respectively associated with LMBs provided within the available configurable memory. The selecting of the memory stripe size for the memory stripes is based in part on the determined amounts of the available configurable memory and the system LMB size.

Abstract: A computing system is provided and includes first and second computing resources defined, during system initialization, as first kernel threads and a second kernel thread with which the first kernel threads are operably associated, a memory manager and a re-prioritization controller. The memory manager is configured to handle a portion of pending input/output (I/O) operations at an interrupt level and to offload a remainder of the pending I/O operations to the first kernel threads according to an offload condition whereby the offloaded I/O operations are queued according to a first scheme. The re-prioritization controller is configured to transfer a portion of the offloaded I/O operations from the first kernel threads to the second kernel thread according to a transfer condition whereby the transferred I/O operations are re-prioritized according to a second scheme.

Abstract: Systems and methods are provided for measuring spectral hemispherical reflectance. One embodiment is a system that includes a laser that emits a beam of light, and an optical chopper disposed between the laser and a sample. The chopper blocks the beam while the chopper is at a first angle of rotation, redirects the beam along a reference path while the chopper is at a second angle of rotation, and permits the beam to follow a sample path through the chopper and strike the sample while the chopper is at a third angle of rotation. The system also includes a hollow sphere that defines a slot through which the sample path and reference path enter the sphere. The hollow sphere includes a spectral hemispherical reflectance detector, a mount that receives the sample at the sphere, and an actuator that rotates the sphere about an axis that intersects the sample.

Abstract: A computing system is provided and includes first and second computing resources defined, during system initialization, as first kernel threads and a second kernel thread with which the first kernel threads are operably associated, a memory manager and a re-prioritization controller. The memory manager is configured to handle a portion of pending input/output (I/O) operations at an interrupt level and to offload a remainder of the pending I/O operations to the first kernel threads according to an offload condition whereby the offloaded I/O operations are queued according to a first scheme. The re-prioritization controller is configured to transfer a portion of the offloaded I/O operations from the first kernel threads to the second kernel thread according to a transfer condition whereby the transferred I/O operations are re-prioritized according to a second scheme.

Abstract: Systems, methods, and computer program products to manage an address translation in a virtually segmented memory system, with included processes comprising a process scoped segment table (STAB) consisting of segment table entries (STEs) that contain effective address segment number (ESID) to system wide unique virtual segment identifier (VSID) mappings, and creating a global kernel segment table (STAB) that itself is translated using a pinned page table entry (PTE). A switch to the global kernel STAB is initiated in response to a page fault interrupt on a process STAB PTE and a PTE reload handler invoked to reload that process STAB PTE. A switch to an original STAB is initiated in order to resume the address translation and resolve the page fault or the interrupt by an operating system executing on the processor.

Abstract: Systems, methods, and computer program products to manage an address translation in a virtually segmented memory system, with included processes comprising a process scoped segment table (STAB) consisting of segment table entries (STEs) that contain effective address segment number (ESID) to system wide unique virtual segment identifier (VSID) mappings, and creating a global kernel segment table (STAB) that itself is translated using a pinned page table entry (PTE). A switch to the global kernel STAB is initiated in response to a page fault interrupt on a process STAB PTE and a PTE reload handler invoked to reload that process STAB PTE. A switch to an original STAB is initiated in order to resume the address translation and resolve the page fault or the interrupt by an operating system executing on the processor.

Abstract: A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request for a pool of memory, determining a size of the requested pool of memory, and creating a dummy memory segment. The size of the dummy memory segment is larger than the size of the requested pool of memory. The dummy memory segment is filled with one or more pages, based on the determined size of the requested pool of memory, and the dummy memory segment is deleted.

Abstract: A computing system is provided and includes first and second computing resources defined, during system initialization, as first kernel threads and a second kernel thread with which the first kernel threads are operably associated, a memory manager and a re-prioritization controller. The memory manager is configured to handle a portion of pending input/output (I/O) operations at an interrupt level and to offload a remainder of the pending I/O operations to the first kernel threads according to an offload condition whereby the offloaded I/O operations are queued according to a first scheme. The re-prioritization controller is configured to transfer a portion of the offloaded I/O operations from the first kernel threads to the second kernel thread according to a transfer condition whereby the transferred I/O operations are re-prioritized according to a second scheme.

Abstract: A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request for a pool of memory, determining a size of the requested pool of memory, and creating a dummy memory segment. The size of the dummy memory segment is larger than the size of the requested pool of memory. The dummy memory segment is filled with one or more pages, based on the determined size of the requested pool of memory, and the dummy memory segment is deleted.

Abstract: Systems and methods are provided for measuring spectral hemispherical reflectance. One embodiment is a system that includes a laser that emits a beam of light, and an optical chopper disposed between the laser and a sample. The chopper blocks the beam while the chopper is at a first angle of rotation, redirects the beam along a reference path while the chopper is at a second angle of rotation, and permits the beam to follow a sample path through the chopper and strike the sample while the chopper is at a third angle of rotation. The system also includes a hollow sphere that defines a slot through which the sample path and reference path enter the sphere. The hollow sphere includes a spectral hemispherical reflectance detector, a mount that receives the sample at the sphere, and an actuator that rotates the sphere about an axis that intersects the sample.

Abstract: Methods to perform an operation comprising identifying, in a software page frame table by an operating system interrupt handler, a physical address of a memory page, wherein the physical address of the memory page is identified based on a virtual segment identifier (VSID) and a page number, wherein the VSID is specified in an interrupt received from a coherent accelerator and wherein the coherent accelerator generated the interrupt in response to a page fault associated with the memory page, and creating, by the operating system interrupt handler, a page table entry in a hardware page table associating the VSID and the page number with the physical address of the memory page, wherein creating the page table entry resolves the page fault.

Abstract: Systems and computer program products to perform an operation comprising identifying, in a software page frame table by an operating system interrupt handler, a physical address of a memory page, wherein the physical address of the memory page is identified based on a virtual segment identifier (VSID) and a page number, wherein the VSID is specified in an interrupt received from a coherent accelerator and wherein the coherent accelerator generated the interrupt in response to a page fault associated with the memory page, and creating, by the operating system interrupt handler, a page table entry in a hardware page table associating the VSID and the page number with the physical address of the memory page, wherein creating the page table entry resolves the page fault.

Abstract: Systems, methods, and computer program products to perform an operation comprising creating, by a kernel, a temporary effective address associated with a virtual segment identifier (VSID), wherein the VSID is received by a processor in an asynchronous interrupt generated by a coherent accelerator in response to a page fault generated by the coherent accelerator in executing an instruction, accessing the temporary effective address by the processor to recreate the page fault on the processor, and resolving the page fault by an operating system executing on the processor.

Abstract: A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request to delete a memory region. The method also includes sorting, after receiving the request, one or more pages of the memory region according to each associated affinity domain of each page. The method further includes sending requests to zero the sorted one or more pages to one or more zeroing threads that are attached to the respective affinity domain. The method further yet includes waiting, after sending the requests, to return to the system caller until a message is received, from the zeroing threads in each affinity domain, indicating that all the page zeroing requests have been processed.

Abstract: Embodiments disclose techniques for sharing a context for a coherent accelerator in a kernel of a computer system. According to one embodiment, a request is received from a first application to perform an I/O operation within a kernel context. The request specifies a first effective address distinct to the first application. The first effective address specifies a location in a first effective address space and a first effective segment identifier. The first effective address is remapped to a second effective address. The second effective address specifies a location in a second effective address space of the kernel context and a second effective segment identifier. A virtual address mapping to a virtual address space within the kernel context is determined. The virtual address is translated to a physical memory address.

Abstract: A computing system is provided and includes first and second computing resources defined, during system initialization, as first kernel threads and a second kernel thread with which the first kernel threads are operably associated, a memory manager and a re-prioritization controller. The memory manager is configured to handle a portion of pending input/output (I/O) operations at an interrupt level and to offload a remainder of the pending I/O operations to the first kernel threads according to an offload condition whereby the offloaded I/O operations are queued according to a first scheme. The re-prioritization controller is configured to transfer a portion of the offloaded I/O operations from the first kernel threads to the second kernel thread according to a transfer condition whereby the transferred I/O operations are re-prioritized according to a second scheme.

Abstract: A method of operating a virtual memory manager (VMM) in a computing system is provided. The method includes receiving a boot-up instruction, determining an amount of available configurable memory, determining a system logical memory block (LMB) size and selecting a memory stripe size for memory stripes respectively associated with LMBs provided within the available configurable memory. The selecting of the memory stripe size for the memory stripes is based in part on the determined amounts of the available configurable memory and the system LMB size.

Abstract: Embodiments disclosed herein generally relate to techniques for zeroing memory in computing systems where access to memory is non-uniform. One embodiment provides a method. The method generally includes receiving, via a system call, a request for a pool of memory. The method also includes determining a size of the requested pool of memory, and creating a dummy memory segment. The size of the dummy memory segment is larger than the size of the requested pool of memory. The method further includes filling the dummy memory segment with one or more pages, based on the determined size of the requested pool of memory, and deleting the dummy memory segment.