Abstract: A video signal clamp involves evaluating the difference between the signal level and the desired clamp level during the back porch interval. A correction signal indicates whether the signal level must be increased or decreased to establish the desired clamp level. Generation of the correction signal involves a median filter algorithm. Any required increase or decrease of the signal level occurs continuously throughout each horizontal line interval.

Abstract: A source responsive to a composite video input signal provides line and burst frequency related timing signals. A measuring circuit responsive to the timing signals provides measurement values which tend to repeat when the video input signal is of a given color television standard and tend to exhibit a pseudo-random distribution otherwise. A histogram processor provides a histogram of the measurements occurring within a given time interval and provides an output signal identifying standard and non-standard video input signal based on the histogram of the measurements.

Abstract: A digital modem is provided for demodulation of differential phase-shift keyed (DPSK) signals in a land mobile satellite receiver. The DPSK demodulator comprises a coarse frequency and lock detect module for identifying and estimating the frequency of the input signal, a numerically controlled oscillator (NCO) for generating in-phase and quadrature signals from the input signal, one pair each of delayed and non-delayed integrate and dump (I&D) modules, a symbol timing module for achieving symbol synchronization by determining the dump time of the I&D modules, a dot product detector for receiving the output of the non-delayed I&D modules and providing a detected data output, and an AFC loop comprising a cross product detector and an AFC loop filter that provides feedback to the NCO and lock detect module. The DPSK demodulator achieves symbol synchronization independent of carrier phase or frequency and at low signal-to-noise ratios.