Patents by Inventor Mark David Hahm

Mark David Hahm has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220319641
    Abstract: Methods, systems, and non-transitory computer readable media are disclosed for accurately and efficiently detect when bubbles impact nucleic-acid-sequencing runs based on data captured during (or derived from) base calls during sequencing runs. In particular, in one or more embodiments, the disclosed systems receive data identifying nucleobase calls and data identifying quality metrics for the nucleobase calls during sequencing cycles. Based on particular nucleobase calls and threshold markers for the quality metrics, the disclosed system utilizes a machine-learning-model to detect a presence of a bubble in a nucleotide-sample slide. Beyond simply detecting the presence of a bubble, the disclosed system can also classify different detected bubbles, such as air bubbles, oil bubbles, or ghost bubbles, or other outputs during sequencing.
    Type: Application
    Filed: March 23, 2022
    Publication date: October 6, 2022
    Inventors: BRANDON TYLER WESTERBERG, JUNQI YUAN, ROBERT EZRA LANGLOIS, MARK DAVID HAHM, GAVIN DEREK PARNABY, THOMAS GROS
  • Publication number: 20220301657
    Abstract: A system for base calling includes memory storing a topology of a neural network, a plurality of weights sets, and sensor data for a series of sensing cycles. Sequencing events span temporal progression of the base calling operation through subseries of sensing cycles, and spatial progression of the base calling operation through locations on a biosensor. A configurable processor is configured to load the topology on the configurable processor, select a weight set in dependence upon a subject subseries of sensing cycles and/or a subject location on the biosensor, load subject sensor data for the subject subseries of sensing cycles and the subject location on the processing elements, configure the topology using the selected weight set, and cause the neural network to process the subject sensor data to produce base call classification data for the subject subseries and the subject location.
    Type: Application
    Filed: March 4, 2022
    Publication date: September 22, 2022
    Applicants: Illumina, Inc., Illumina Software, Inc.
    Inventors: Gavin Derek PARNABY, Mark David HAHM, Andrew Christopher DU PREEZ, Dorna KASHEFHAGHIGHI, Kishore JAGANATHAN
  • Publication number: 20210265015
    Abstract: A system for analysis of base call sensor output has memory accessible by the runtime program storing tile data including sensor data for a tile from sensing cycles of a base calling operation. A neural network processor having access to the memory is configured to execute runs of a neural network using trained parameters to produce classification data for sensing cycles. A run of the neural network operates on a sequence of N arrays of tile data from respective sensing cycles of N sensing cycles, including a subject cycle, to produce the classification data for the subject cycle. Data flow logic moves tile data and the trained parameters from the memory to the neural network processor for runs of the neural network using input units including data for spatially aligned patches of the N arrays from respective sensing cycles of N sensing cycles.
    Type: Application
    Filed: February 15, 2021
    Publication date: August 26, 2021
    Applicant: Illumina, Inc.
    Inventors: Gavin Derek PARNABY, Mark David HAHM, Andrew Christopher DU PREEZ, Jason Edward COSKY, John S. VIECELI, Andrew Dodge HEIBERG, Gery VESSERE
  • Publication number: 20210183468
    Abstract: Systems, methods, and computer programs for analyzing genetic sequence data is disclosed. In one aspect, the system can include one or more of a first integrated circuit, with each first integrated circuit forming a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of a sequence analysis pipeline. Additionally, the system can include one or more second integrated circuits, with each second integrated circuit forming a field programmable gate array (FPGA). The FPGA can be configured by firmware to arrange a set of hardwired digital logic circuits to perform a second set of genomic processing stages of the sequence analysis pipeline, the set of hardwired digital logic circuits of each FPGA being arranged as a set of processing engines to perform the second set of genomic processing stages.
    Type: Application
    Filed: February 2, 2021
    Publication date: June 17, 2021
    Inventors: Mark David Hahm, Jacobus de Beer, Varun Jain, Rami Mehio, Eric Ojard, Michael Ruehle, Amnon Ptashek, Severine Catreux, Arun Visvanath
  • Patent number: 10068052
    Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: September 4, 2018
    Assignee: Edico Genome Corporation
    Inventors: Pieter van Rooyen, Michael Ruehle, Rami Mehio, Gavin Stone, Mark David Hahm, Eric Ojard, Amnon Ptashek
  • Publication number: 20180196916
    Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.
    Type: Application
    Filed: March 7, 2018
    Publication date: July 12, 2018
    Inventors: Pieter van Rooyen, Michael Ruehle, Rami Mehio, Gavin Stone, Mark David Hahm, Eric Ojard, Amnon Ptashek
  • Publication number: 20180189444
    Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.
    Type: Application
    Filed: February 27, 2018
    Publication date: July 5, 2018
    Inventors: Pieter van Rooyen, Michael Ruehle, Rami Mehio, Gavin Stone, Mark David Hahm, Eric Ojard, Amnon Ptashek
  • Publication number: 20180121601
    Abstract: A system, method and apparatus for executing a bioinformatics analysis on genetic sequence data is provided. Particularly, a genomics analysis platform for executing a sequence analysis pipeline is provided. The genomics analysis platform includes one or more of a first integrated circuit, where each first integrated circuit forms a central processing unit (CPU) that is responsive to one or more software algorithms that are configured to instruct the CPU to perform a first set of genomic processing steps of the sequence analysis pipeline.
    Type: Application
    Filed: October 27, 2017
    Publication date: May 3, 2018
    Inventors: Mark David Hahm, Jacobus de Beer, Varun Jain, Rami Mehio, Eric Ojard, Michael Ruehle, Amnon Ptashek, Severine Catreux, Arun Visvanath
  • Patent number: 8571087
    Abstract: A baseband processing module according to the present invention includes a multi-path scanner module. The multi-path scanner module is operable to receive timing and scrambling code information regarding an expected multi-path signal component of a WCDMA signal. Then, the multi-path scanner module is operable to identify a plurality of multi-path signal components of the WCDMA signal by descrambling, despreading and correlating a known symbol pattern of/with a baseband RX signal within a search window. The multi-path scanner module is operable to determine timing information for the plurality of multi-path signal components of the WCDMA signal found within the search window and to pass this information to a coupled rake receiver combiner module.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: October 29, 2013
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Baoguo Yang
  • Patent number: 8472410
    Abstract: A baseband processing module includes an RX interface, a rake receiver combiner module, and may include additional components. The RX interface receives the baseband signals from an RF front end and creates baseband RX signal samples there from. The rake receiver combiner module includes control logic, an input buffer, a rake despreader module, and an output buffer. The rake despreader module is operable to despread the baseband RX signal samples in a time divided fashion to produce channel symbols including pilot channel symbols and physical channel symbols.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: June 25, 2013
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Huaiyu (Hanks) Zeng, Joseph Boccuzzi, Nelson R. Sollenberger
  • Patent number: 8145178
    Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: March 27, 2012
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Li Fung Chang
  • Patent number: 8107489
    Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives at least one set of IR samples from the memory, forms a turbo code word from the at least one set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric performs error detection operations, and extracts information from a MAC packet that it produces.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: January 31, 2012
    Assignee: Broadcom Corporation
    Inventors: Jie Lai, Mark David Hahm
  • Patent number: 8073001
    Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives at least one set of IR samples from the memory, forms a turbo code word from the at least one set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching, performs error detection operations, and extracts information from a MAC packet that it produces.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: December 6, 2011
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Li Fung Chang, Michiel Petrus Lotter
  • Publication number: 20110149866
    Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.
    Type: Application
    Filed: February 28, 2011
    Publication date: June 23, 2011
    Applicant: BROADCOM CORPORATION
    Inventors: Mark David Hahm, Li Fung Chang
  • Patent number: 7907662
    Abstract: A Radio Frequency (RF) receiver includes a RF front end and a baseband processing module coupled to the RF front end that is operable to receive a time domain signal that includes time domain training symbols and time domain data symbols. The baseband processing module includes a channel estimator operable to process the time domain training symbols to produce a time domain channel estimate, a Fast Fourier Transformer operable to convert the time domain channel estimate to the frequency domain to produce a frequency domain channel estimate, a weight calculator operable to produce frequency domain equalizer coefficients based upon the frequency domain channel estimate, an Inverse Fast Fourier Transformer operable to converting the frequency domain equalizer coefficients to the time domain to produce time domain equalizer coefficients, and an equalizer operable to equalize the time domain data symbols using the time domain equalizer coefficients.
    Type: Grant
    Filed: February 10, 2010
    Date of Patent: March 15, 2011
    Assignee: Broadcom Corporation
    Inventors: Junqiang Li, Mark David Hahm, Nelson R. Sollenberger, Li Fung Chang
  • Patent number: 7904049
    Abstract: A baseband processing module for use within a Radio Frequency (RF) transceiver includes a downlink/uplink interface, TX processing components, a processor, memory, RX processing components, and a turbo decoding module. The RX processing components receive a baseband RX signal from the RF front end, produce a set of IR samples from the baseband RX signal, and transfer the set of IR samples to the memory. The turbo decoding module receives a set of IR samples from the memory, forms a turbo code word from the set of IR samples, turbo decodes the turbo code word to produce inbound data, and outputs the inbound data to the downlink/uplink interface. The turbo decoding module performs metric normalization based upon a chosen metric, performs de-rate matching on the set of IR samples, performs error detection operations, and extracts information from a MAC packet that it produces.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: March 8, 2011
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Li Fung Chang
  • Patent number: 7894508
    Abstract: A baseband processing module includes TX processing components, a processor, memory, an RX interface, and a cell searcher module. The TX processing components receive outbound data, process the outbound data to produce a baseband TX signal, and output the baseband TX signal to a RF front end of the RF transceiver. The RX interface receives a baseband RX signal from the RF front end carrying a WCDMA signal. The cell searcher module receives the baseband RX signal, scans for WCDMA energy within the baseband RX signal, acquires slot synchronization to the WCDMA signal based upon correlation with a Primary Synchronization Channel (PSCH) of the WCDMA signal, acquires frame synchronization to, and identify a code group of, the WCDMA signal based upon correlation with a Secondary Synchronization Channel (SSCH) of the WCDMA signal, and identifies the scrambling code of the WCDMA signal based upon correlation with a Common Pilot Channel (CPICH) of the WCDMA signal.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: February 22, 2011
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Li Fung Chang, Nelson R. Sollenberger
  • Patent number: 7894404
    Abstract: A wireless terminal is operable to receive a Wideband Code Division Multiple Access (WCDMA) signal from a base station and includes clock circuitry, a wireless interface, and a Primary Synchronization (PSYNC) module. The clock circuitry generates a wireless terminal clock using a wireless terminal oscillator. The wireless interface receives the WCDMA signal, which is produced by the base station using a base station clock that is produced using a base station oscillator that is more accurate than the wireless terminal oscillator. The PSYNC module includes a plurality of PSYNC correlation branches. Each PSYNC correlation branch phase rotates the WCDMA signal based upon a respective frequency offset, correlates the phase rotated WCDMA signal with a Primary Synchronization Channel (PSCH) code over a plurality of sampling positions, and produces PSYNC correlation energies based upon the correlations for each of the plurality of sampling positions.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: February 22, 2011
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Wei Luo, Hendrik Johannes Conroy
  • Patent number: 7889781
    Abstract: A system for processing radio frequency (RF) signals includes a searcher and a Cluster Path Processor (CPP). The searcher detects a maximum signal energy level and position of at least one of a plurality of individual distinct path signals in a signal cluster, wherein at least a portion of the plurality of individual distinct path signals is received within a duration of a corresponding delay spread. The CPP includes a group finger array having a plurality of group fingers and determines a coarse sampling position of the group finger array based upon the position of the at least one of a plurality of individual distinct path signals in the signal cluster. The CPP determines a fine sampling position based upon determines a composite channel energy estimate for the plurality of individual distinct path signals. Using this fine sampling position, the CPP receives at least a portion of the plurality of individual distinct path signals by the group finger array.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: February 15, 2011
    Assignee: Broadcom Corporation
    Inventors: Junqiang Li, Mark David Hahm, Li Fung Chang
  • Patent number: 7885237
    Abstract: A wireless terminal is operable to receive a Wideband Code Division Multiple Access (WCDMA) signal from a base station and includes clock circuitry, a wireless interface, and a Primary Synchronization (PSYNC) module. The clock circuitry generates a wireless terminal clock using a wireless terminal oscillator. The wireless interface receives the WCDMA signal, which is produced by the base station using a base station clock that is produced using a base station oscillator that is more accurate than the wireless terminal oscillator. The PSYNC module includes a plurality of PSYNC correlation branches. Each PSYNC correlation branch phase rotates the WCDMA signal based upon a respective frequency offset, correlates the phase rotated WCDMA signal with a Primary Synchronization Channel (PSCH) code over a plurality of sampling positions, and produces PSYNC correlation energies based upon the correlations for each of the plurality of sampling positions.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: February 8, 2011
    Assignee: Broadcom Corporation
    Inventors: Mark David Hahm, Wei Luo, Hendrik Johannes Conroy