Patents by Inventor Mark David Sweet

Mark David Sweet has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus for delaying the output of data onto a system bus
    Patent number: 5771372
    Abstract: Circuitry within a processor delays the launching of data onto an external bus by a factor that is proportional to the ratio of an internal processor clock speed to the system or external bus clock speed. This delay provides a delay in the launching of data to external bus devices so that these slower speed external bus devices have enough time to capture the data.
    Type: Grant
    Filed: October 3, 1995
    Date of Patent: June 23, 1998
    Assignee: International Business Machines Corp.
    Inventors: Dac Cong Pham, Mark David Sweet, Cang Tran
  • Interface for logic simulation using parallel bus for concurrent transfers and having FIFO buffers for sending data to receiving units when ready
    Patent number: 5721953
    Abstract: A host interface for a logic simulation machine for transferring data between the logic simulation machine and a host computer is disclosed. The host interface includes a First-In First-Out buffer provided between the logic simulation machine and the host computer for temporarily storing data being transferred between the logic simulation machine and the host computer until a receiver of the data is ready to receive the data. The host interface minimizes delays due to host interaction with the logic simulation machine during the communication between the host and the logic simulation machine.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: February 24, 1998
    Assignee: International Business Machines Corporation
    Inventors: Richard Gregory Fogg, Jr., Mark David Sweet