Patents by Inventor Mark Drucker
Mark Drucker has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180271735Abstract: A multi-layer foam fitness apparatus for use in strength and stretching exercises is provided. The apparatus has a user-engaging portion and a surface-engaging portion. The user-engaging portion is comprised of closed cell EVA foam of a first hardness, and the surface-engaging portion is comprised of a closed cell EVA foam of a second, lesser hardness, wherein the surface-engaging portion is comprised of non-slip memory foam. The user-engaging portion comprises one or more faces, which may be flat, angled, or curved, or some combination of the foregoing.Type: ApplicationFiled: March 20, 2018Publication date: September 27, 2018Applicant: WEDGE EFFECT, LLCInventors: Mark DRUCKER, Marina MILIOS, Eleana FRANGEDIS
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Patent number: 9754860Abstract: A semiconductor structure is formed with first and second semiconductor wafers and a redistribution layer. The first semiconductor wafer is formed with a first active layer and a first interconnect layer. The second semiconductor wafer is formed with a second active layer and a second interconnect layer. The second semiconductor wafer is inverted and bonded to the first semiconductor wafer, and a substrate is removed from the second semiconductor wafer. The redistribution layer redistributes electrical connective pad locations on a side of the second semiconductor wafer. The redistribution layer also electrically contacts the first interconnect layer through a hole in the second active layer and the second interconnect layer.Type: GrantFiled: July 8, 2014Date of Patent: September 5, 2017Assignee: QUALCOMM IncorporatedInventors: Stuart B. Molin, Michael A. Stuber, Mark Drucker
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Publication number: 20160284671Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface. A first active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the first active layer and formed on the second surface of the insulating layer. A substrate having a first surface and a second surface, with a second active layer formed in the first surface, is provided such that the first active layer is coupled to the second surface of the substrate.Type: ApplicationFiled: June 3, 2016Publication date: September 29, 2016Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Patent number: 9412644Abstract: A first wafer is provided that includes an insulating layer, a first active layer, and a handle layer. The insulating layer has a first surface and a second surface. The first active layer contacts the first surface of the insulating layer. The handle layer contacts the second surface of the insulating layer. A second wafer is provided that includes a substrate and a second active layer. The substrate has a first surface and a second surface. The second active layer contacts the first surface of the substrate. The second wafer is bonded to the first wafer by physically connecting the first active layer to the second surface of the substrate. The handle layer is removed. A metal bond pad is formed on the second surface of the insulating layer. The metal bond pad is electrically connected to the first active layer.Type: GrantFiled: December 16, 2014Date of Patent: August 9, 2016Assignee: Qualcomm IncorporatedInventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Patent number: 9368468Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board.Type: GrantFiled: December 30, 2014Date of Patent: June 14, 2016Assignee: QUALCOMM SWITCH CORP.Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Patent number: 9233272Abstract: A treadmill, having: (a) a frame with front and rear rollers and a continuous tread wrapped therearound; (b) a flywheel connected to one of the front or rear rollers; and (c) a magnetic resistance unit positioned near the flywheel to provide resistance to rotation of the flywheel. The magnetic resistance unit is moved up and down by an operator to move a series of magnets to different positions near the flywheel such that the position of the magnets determines the amount of resistance provided to rotation of the flywheel.Type: GrantFiled: September 16, 2013Date of Patent: January 12, 2016Assignee: SHREDMILL LLCInventors: Anthony J. Villani, Mark Drucker
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Publication number: 20150140782Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface. A first active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the first active layer and formed on the second surface of the insulating layer. A substrate having a first surface and a second surface, with a second active layer formed in the first surface, is provided such that the first active layer is coupled to the second surface of the substrate.Type: ApplicationFiled: December 16, 2014Publication date: May 21, 2015Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Publication number: 20150108640Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board. A method of fabricating an integrated circuit assembly includes coupling a handle wafer to the active layer of a semiconductor-on-insulator wafer, removing the substrate of the semiconductor-on-insulator, forming a bond pad connecting to the active layer on the exposed insulator surface, bonding the bond pad to a printed circuit board using a solder bump, and removing the handle wafer.Type: ApplicationFiled: December 30, 2014Publication date: April 23, 2015Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Patent number: 8921168Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board. A method of fabricating an integrated circuit assembly includes coupling a handle wafer to the active layer of a semiconductor-on-insulator wafer, removing the substrate of the semiconductor-on-insulator, forming a bond pad connecting to the active layer on the exposed insulator surface, bonding the bond pad to a printed circuit board using a solder bump, and removing the handle wafer.Type: GrantFiled: December 21, 2012Date of Patent: December 30, 2014Assignee: Silanna Semiconductor U.S.A., Inc.Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Patent number: 8912646Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface. A first active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the first active layer and formed on the second surface of the insulating layer. A substrate having a first surface and a second surface, with a second active layer formed in the first surface, is provided such that the first active layer is coupled to the second surface of the substrate.Type: GrantFiled: December 21, 2012Date of Patent: December 16, 2014Assignee: Silanna Semiconductor U.S.A., Inc.Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler
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Publication number: 20140319698Abstract: A semiconductor structure is formed with first and second semiconductor wafers and a redistribution layer. The first semiconductor wafer is formed with a first active layer and a first interconnect layer. The second semiconductor wafer is formed with a second active layer and a second interconnect layer. The second semiconductor wafer is inverted and bonded to the first semiconductor wafer, and a substrate is removed from the second semiconductor wafer. The redistribution layer redistributes electrical connective pad locations on a side of the second semiconductor wafer. The redistribution layer also electrically contacts the first interconnect layer through a hole in the second active layer and the second interconnect layer.Type: ApplicationFiled: July 8, 2014Publication date: October 30, 2014Inventors: Stuart B. Molin, Michael A. Stuber, Mark Drucker
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Publication number: 20140035129Abstract: An integrated circuit assembly includes an insulating layer having a having a first surface and a second surface, where the first surface of the insulating layer is less than 10 microns below an upper plane of the integrated circuit assembly. An active layer contacts the first surface of the insulating layer. A metal bond pad is electrically connected to the active layer and formed on the second surface of the insulating layer, and is also electrically connected to a printed circuit board. A method of fabricating an integrated circuit assembly includes coupling a handle wafer to the active layer of a semiconductor-on-insulator wafer, removing the substrate of the semiconductor-on-insulator, forming a bond pad connecting to the active layer on the exposed insulator surface, bonding the bond pad to a printed circuit board using a solder bump, and removing the handle wafer.Type: ApplicationFiled: December 21, 2012Publication date: February 6, 2014Applicant: IO SEMICONDUCTOR, INC.Inventors: Michael A. Stuber, Stuart B. Molin, Mark Drucker, Peter Fowler