Patents by Inventor Mark E. Elledge

Mark E. Elledge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cellular modem processing
    Patent number: 9198224
    Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.
    Type: Grant
    Filed: February 5, 2012
    Date of Patent: November 24, 2015
    Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
  • CELLULAR MODEM PROCESSING
    Publication number: 20120183029
    Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol.
    Type: Application
    Filed: February 5, 2012
    Publication date: July 19, 2012
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
  • Cellular modem processing
    Patent number: 8131316
    Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.
    Type: Grant
    Filed: October 26, 2009
    Date of Patent: March 6, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
  • Cellular modem processing
    Patent number: 7623894
    Abstract: A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times.
    Type: Grant
    Filed: October 9, 2003
    Date of Patent: November 24, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: John J. Vaglica, Christopher K. Y. Chun, Jose G. Corleto-Mena, Arnaldo R. Cruz, Jianping Tao, Mieu V. Vu, Mark E. Elledge, Charbel Khawand, Arthur M. Goldberg, David J. Hayes
  • Data processing system having a serial data controller
    Patent number: 7047350
    Abstract: A data processing system (30) includes two processors (70, 80) and a serial data controller (36) for selectively multiplexing serial data signals between one or more of a plurality of serial data devices (40, 42, 44, 46, 74, 76, 82) The serial data controller (36) includes one or more host ports (50, 52, 54) and one or more peripheral ports (56, 58, 60, 62) coupled together through a switching matrix (64). A control circuit (66) and a plurality of control registers (68) are used to configure and control a serial data path created between two or more ports including clock and frame synchronization timing of the data path.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: May 16, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Mark E. Elledge, John J. Vaglica, Sreedharan Bhaskaran, Allen Guoyuan Deng