Patents by Inventor Mark E. Gibson

Mark E. Gibson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4994887
    Abstract: An integrated circuit having PMOS, NMOS and NPN transistors is described for applications in which both digital and analog circuits are required. The integrated circuit is designed to allow standard CMOS cells to be used in the integrated circuit without redesign. A P+ substrate (48) is provided upon which a first P- epitaxy layer (46) is formed. N+ DUF regions (50,52) are provided for the PMOS and NPN transistors, respectively. The base region (68) is formed in an Nwell (58) by implantation and diffusion. Before diffusion, a nitride layer (70) is formed over the base (68) to provided an inert annealing thereof. The base diffusion and collector diffusion occurs before the CMOS channel stop and source/drain diffusions in order to prevent altering diffusion times for the MOS transistors.
    Type: Grant
    Filed: November 13, 1987
    Date of Patent: February 19, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Louis N. Hutter, Mark E. Gibson, Jeffrey P. Smith, Shiu-Hang Yan, Arnold C. Conway, John P. Erdeljac, James D. Goon, AnhKim Duong, Mary A. Murphy, Susan S. Kearney