Abstract: A circuit for interconnecting electrical components in a stacked arrangement by the use of connector elements in which a substantially continuous bus is formed by the connector elements and the components to conduct signals between the components in the arrangement. The circuit and arrangement include identifier circuitry for automatically assigning an identifier to each electrical component in the stack and terminating circuitry for selectively establishing terminating connections between a terminal electrical component of the stack and the substantially continuous signal bus. The identifier circuitry and the terminating circuitry can be implemented by programmable array logic located in each electrical component.