Patents by Inventor Mark ELIOT
Mark ELIOT has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220136183Abstract: The present disclosure relates to a plant for manufacturing heated asphalt mix. In particular, the disclosure relates to a batch asphalt mix plant for using a microwave heating vessel located in close proximity to a storage silo to heat asphalt mix at the point of storage using a batch production method.Type: ApplicationFiled: November 23, 2021Publication date: May 5, 2022Inventor: Mark Eliot
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Patent number: 11198977Abstract: The present disclosure relates to a plant for manufacturing heated asphalt mix. In particular, the disclosure relates to a batch asphalt mix plant for using a microwave heating vessel located in close proximity to a storage silo to heat asphalt mix at the point of storage using a batch production method.Type: GrantFiled: March 23, 2017Date of Patent: December 14, 2021Assignee: A.L.M. HOLDING COMPANYInventor: Mark Eliot
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Patent number: 10318998Abstract: A method of selling a product for charity in a communications network includes providing a website communicatively connected to the communications network, receiving an offer of the product for discount from a seller device, via the website over the communications network, receiving a request for the product from a charitable device, via the website over the communications network, receiving a purchase order for the product from a contributor device, via the website over the communications network, transacting purchase of the product for discount by the contributor device, via the website over the communications network, and scheduling supply of the product of the step of transacting purchase to the charitable device, via the website over the communications network.Type: GrantFiled: August 5, 2014Date of Patent: June 11, 2019Inventors: Mark Eliot Courtney, Elizabeth Ann Deering
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Publication number: 20190100886Abstract: The present disclosure relates to a plant for manufacturing heated asphalt mix. In particular, the disclosure relates to a batch asphalt mix plant for using a microwave heating vessel located in close proximity to a storage silo to heat asphalt mix at the point of storage using a batch production method.Type: ApplicationFiled: March 23, 2017Publication date: April 4, 2019Inventor: Mark Eliot
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Publication number: 20150051995Abstract: A method of selling a product for charity in a communications network includes providing a website communicatively connected to the communications network, receiving an offer of the product for discount from a seller device, via the website over the communications network, receiving a request for the product from a charitable device, via the website over the communications network, receiving a purchase order for the product from a contributor device, via the website over the communications network, transacting purchase of the product for discount by the contributor device, via the website over the communications network, and scheduling supply of the product of the step of transacting purchase to the charitable device, via the website over the communications network.Type: ApplicationFiled: August 5, 2014Publication date: February 19, 2015Inventors: Mark Eliot Courtney, Elizabeth Ann Deering
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Publication number: 20140241801Abstract: An apparatus and method for small scale heating of an asphalt material suitable for repair and/or resurfacing of paved surfaces, most preferably where the material is placed in a small microwavable container.Type: ApplicationFiled: January 9, 2014Publication date: August 28, 2014Applicant: Leap Technologies, Inc.Inventor: Mark ELIOT
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Publication number: 20140131347Abstract: An apparatus and method for small scale heating of an asphalt material suitable for repair and/or resurfacing of paved surfaces, most preferably where the material is placed in a small microwavable container.Type: ApplicationFiled: May 21, 2013Publication date: May 15, 2014Applicant: CRIUS TECH LLCInventor: Mark ELIOT
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Patent number: 7694121Abstract: A mechanism for protected operating system boot that prevents rogue components from being loaded with the operating system, and thus prevents divulgence of the system key under inappropriate circumstances. After a portion of the machine startup procedure has occurred, the operating system loader is run, the loader is validated, and a correct machine state is either verified to exist and/or created. Once the loader has been verified to be a legitimate loader, and the machine state under which it is running is verified to be correct, the loader's future behavior is known to protect against the loading of rogue components that could cause divulgence of the system key. With the loader's behavior being known to be safe for the system key, the validator may unseal the system key and provides it to the loader.Type: GrantFiled: June 30, 2004Date of Patent: April 6, 2010Assignee: Microsoft CorporationInventors: Bryan Mark Willman, Paul England, Kenneth D. Ray, Jamie Hunter, Lonnie Dean McMichael, Derek Norman LaSalle, Pierre Jacomet, Mark Eliot Paley, Thekkthalackal Varugis Kurien, David B. Cross
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Patent number: 7674674Abstract: A memory gain cell for a memory circuit, a memory circuit formed from multiple memory gain cells, and methods of fabricating such memory gain cells and memory circuits. The memory gain cell includes a storage device capable of holding a stored electrical charge, a write device, and a read device. The read device includes a fin of semiconducting material, electrically-isolated first and second gate electrodes flanking the fin, and a source and drain formed in the fin adjacent to the first and the second gate electrodes. The first gate electrode is electrically coupled with the storage device. The first and second gate electrodes are operative for gating a region of the fin defined between the source and the drain to thereby regulate a current flowing from the source to the drain. When gated, the magnitude of the current is dependent upon the electrical charge stored by the storage device.Type: GrantFiled: June 23, 2008Date of Patent: March 9, 2010Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, III, Mark Eliot Masters, Peter H. Mitchell
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Patent number: 7566613Abstract: A memory gain cell for a memory circuit, a memory circuit formed from multiple memory gain cells, and methods of fabricating such memory gain cells and memory circuits. The memory gain cell includes a storage device capable of holding a stored electrical charge, a write device, and a read device. The read device includes a fin of semiconducting material, electrically-isolated first and second gate electrodes flanking the fin, and a source and drain formed in the fin adjacent to the first and the second gate electrodes. The first gate electrode is electrically coupled with the storage device. The first and second gate electrodes are operative for gating a region of the fin defined between the source and the drain to thereby regulate a current flowing from the source to the drain. When gated, the magnitude of the current is dependent upon the electrical charge stored by the storage device.Type: GrantFiled: September 7, 2005Date of Patent: July 28, 2009Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, III, Mark Eliot Masters, Peter H. Mitchell
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Patent number: 7473633Abstract: Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.Type: GrantFiled: July 20, 2006Date of Patent: January 6, 2009Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, III, Mark Eliot Masters, Peter H Mitchell, Stanislav Polonsky
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Publication number: 20080261363Abstract: A memory gain cell for a memory circuit, a memory circuit formed from multiple memory gain cells, and methods of fabricating such memory gain cells and memory circuits. The memory gain cell includes a storage device capable of holding a stored electrical charge, a write device, and a read device. The read device includes a fin of semiconducting material, electrically-isolated first and second gate electrodes flanking the fin, and a source and drain formed in the fin adjacent to the first and the second gate electrodes. The first gate electrode is electrically coupled with the storage device. The first and second gate electrodes are operative for gating a region of the fin defined between the source and the drain to thereby regulate a current flowing from the source to the drain. When gated, the magnitude of the current is dependent upon the electrical charge stored by the storage device.Type: ApplicationFiled: June 23, 2008Publication date: October 23, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, Mark Eliot Masters, Peter H. Mitchell
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Patent number: 7135773Abstract: Conductive paths in an integrated circuit are formed using multiple undifferentiated carbon nanotubes embedded in a conductive metal, which is preferably copper. Preferably, conductive paths include vias running between conductive layers. Preferably, composite vias are formed by forming a metal catalyst pad on a conductor at the via site, depositing and etching a dielectric layer to form a cavity, growing substantially parallel carbon nanotubes on the catalyst in the cavity, and filling the remaining voids in the cavity with copper. The next conductive layer is then formed over the via hole.Type: GrantFiled: February 26, 2004Date of Patent: November 14, 2006Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, III, Mark Eliot Masters, Peter H. Mitchell, Stanislav Polonsky
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Patent number: 7109546Abstract: A gain cell for a memory circuit, a memory circuit formed from multiple gain cells, and methods of fabricating such gain cells and memory circuits. The memory gain cell includes a storage capacitor, a write device electrically coupled with the storage capacitor for charging and discharging the storage capacitor to define a stored electrical charge, and a read device. The read device includes one or more semiconducting carbon nanotubes each electrically coupled between a source and drain. A portion of each semiconducting carbon nanotube is gated by the read gate and the storage capacitor to thereby regulate a current flowing through each semiconducting carbon nanotube from the source to the drain. The current is proportional to the electrical charge stored by the storage capacitor. In certain embodiments, the memory gain cell may include multiple storage capacitors.Type: GrantFiled: June 29, 2004Date of Patent: September 19, 2006Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, III, Mark Eliot Masters, Peter H. Mitchell
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Patent number: 6970372Abstract: A memory gain cell for a memory circuit, a memory circuit formed from multiple memory gain cells, and methods of fabricating such memory gain cells and memory circuits. The memory gain cell includes a storage device capable of holding a stored electrical charge, a write device, and a read device. The read device includes a fin of semiconducting material, electrically-isolated first and second gate electrodes flanking the fin, and a source and drain formed in the fin adjacent to the first and the second gate electrodes. The first gate electrode is electrically coupled with the storage device. The first and second gate electrodes are operative for gating a region of the fin defined between the source and the drain to thereby regulate a current flowing from the source to the drain. When gated, the magnitude of the current is dependent upon the electrical charge stored by the storage device.Type: GrantFiled: June 29, 2004Date of Patent: November 29, 2005Assignee: International Business Machines CorporationInventors: Toshiharu Furukawa, Mark Charles Hakey, David Vaclav Horak, Charles William Koburger, III, Mark Eliot Masters, Peter H. Mitchell