Patents by Inventor Mark Elzinga
Mark Elzinga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949446Abstract: The present disclosure relates to a concept for a transformer, a transmitter circuit, a semiconductor chip, a semiconductor package, a base station, a mobile device and a method for a radio frequency transmitter. The transformer for a radio frequency transmitter circuit comprises a primary coil and a secondary coils, which are configured to receive an input signal and to provide an output signal, and a ternary coil configured to provide a feedback signal.Type: GrantFiled: June 26, 2020Date of Patent: April 2, 2024Assignee: Intel CorporationInventors: Daniel Gruber, Mark Elzinga, Martin Clara
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Patent number: 11918174Abstract: Vacuum cleaner, comprising a tube having a first diameter, a hose having a second diameter exceeding the first diameter by at least 15%, and a transition piece (T) having a first end (1) arranged for being connected to the tube, and a second end (2) arranged for being connected to the hose, wherein the transition piece (T) has a curved part that has a non-circular cross-section, the curved part having a first part (I) in which in a direction from the first end (1) to the second end (2), a first dimension (R1) of the cross-section increases to a diameter exceeding the first diameter by 15%, the first dimension (R1) being in a radial direction of the curved part, while a second dimension (R2) of the cross-section, perpendicular to the first dimension (R1), does not exceed the first diameter by more than 10%.Type: GrantFiled: November 21, 2019Date of Patent: March 5, 2024Assignee: KONINKLIJKE PHILIPS N.V.Inventors: Johannes Tseard Van Der Kooi, Mark Elzinga, Bastian Cornelis Kleine-Doepke
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Patent number: 11612900Abstract: A cyclone separation device includes a cyclone chamber for separating dirt from incoming air, a dirt collecting chamber arranged adjacent to the cyclone chamber for collecting dirt particles separated from air, and a dirt duct between the cyclone chamber and the dirt collecting chamber for allowing dirt particles to exit the cyclone chamber into the dirt collecting chamber. To reduce the generation of noise-generating air vortices, the dirt duct has an edge protruding into a direction at an angle to the dirt duct at an exit ridge of the cyclone chamber that is first encountered by the air rotating in the cyclone chamber. Preferably, the edge is formed by a tangential extension of a wall of the cyclone chamber. A vacuum cleaner advantageously includes such a cyclone separation device.Type: GrantFiled: February 10, 2020Date of Patent: March 28, 2023Assignee: KONINKLIJKE PHILIPS N.V.Inventors: Michael Van Den Bosch, Johannes Tseard Van Der Kooi, Mark Elzinga
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Patent number: 11495382Abstract: Described is a high Q-factor inductor. The inductor is formed as a unit cell coil, which is copied twice for a dual-coil inductor and copied four times for a quad-coil inductor. For each copy of the unit cell coil, the coil is rotated a subsequent substantially 90 degrees or substantially ?90 degrees. The rotation enables the terminals of the inductor to be routed equal-distant to a circuit that is placed in the line of symmetry between the two coils.Type: GrantFiled: January 19, 2019Date of Patent: November 8, 2022Assignee: Intel CorporationInventor: Mark Elzinga
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Publication number: 20220040711Abstract: A cyclone separation device includes a cyclone chamber for separating dirt from incoming air, a dirt collecting chamber arranged adjacent to the cyclone chamber for collecting dirt particles separated from air, and a dirt duct between the cyclone chamber and the dirt collecting chamber for allowing dirt particles to exit the cyclone chamber into the dirt collecting chamber. To reduce the generation of noise-generating air vortices, the dirt duct has an edge protruding into a direction at an angle to the dirt duct at an exit ridge of the cyclone chamber that is first encountered by the air rotating in the cyclone chamber. Preferably, the edge is formed by a tangential extension of a wall of the cyclone chamber. A vacuum cleaner advantageously includes such a cyclone separation device.Type: ApplicationFiled: February 10, 2020Publication date: February 10, 2022Applicant: KONINKLIJKE PHILIPS N.V.Inventors: Michael Van Den Bosch, Johannes Tseard Van Der Kooi, Mark Elzinga
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Patent number: 11199297Abstract: An LED lamp includes a lamp base for insertion into a reflector of an automotive front lighting assembly; a panel extending from the lamp base with a first vertical side facing into one half of the reflector and a second vertical side facing into the other half of the reflector; a primary light source including a set of LED dies on each vertical side of the panel; a two-part shield including a first shield half shielding the LED dies on the first vertical side of the panel and a second shield half shielding the LED dies on the second vertical side of the panel. The two-part shield essentially has the form of a shield in a functionally equivalent filament lamp for providing a low beam. A lighting arrangement includes such an LED lamp; a reflector to receive the lamp; and an electrical interface for connecting to a controller.Type: GrantFiled: March 2, 2018Date of Patent: December 14, 2021Assignee: Lumileds LLCInventors: Bernd Schoenfelder, Andreas Timinger, Danijel Labas, Mark Elzinga
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Publication number: 20210378470Abstract: Vacuum cleaner, comprising a tube having a first diameter, a hose having a second diameter exceeding the first diameter by at least 15%, and a transition piece (T) having a first end (1) arranged for being connected to the tube, and a second end (2) arranged for being connected to the hose, wherein the transition piece (T) has a curved part that has a non- circular cross-section, the curved part having a first part (I) in which in a direction from the first end (1) to the second end (2), a first dimension (R1) of the cross-section increases to a diameter exceeding the first diameter by 15%, the first dimension (R1) being in a radial direction of the curved part, while a second dimension (R2) of the cross-section, perpendicular to the first dimension (R1), does not exceed the first diameter by more than 10%.Type: ApplicationFiled: November 21, 2019Publication date: December 9, 2021Inventors: Johannes Tseard VAN DER KOOI, Mark ELZINGA, Bastian Cornelis KLEINE-DOEPKE
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Publication number: 20210131616Abstract: An LED lamp includes a lamp base for insertion into a reflector of an automotive front lighting assembly; a panel extending from the lamp base with a first vertical side facing into one half of the reflector and a second vertical side into the other half of the reflector; a primary light source including a set of LED dies on each vertical side of the panel; a two-part shield including a first shield half shielding the LED dies on the first vertical side of the panel and a second shield half shielding the LED dies on the second vertical side of the panel. The two-part shield essentially has the form of a shield in a functionally equivalent filament lamp for providing a low beam. A lighting arrangement includes such an LED lamp; a reflector to receive the lamp; and an electrical interface for connecting to a controller.Type: ApplicationFiled: March 2, 2018Publication date: May 6, 2021Applicant: Lumileds LLCInventors: Bernd Schoenfelder, Andreas Timinger, Danijel Labas, Mark Elzinga
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Patent number: 10944411Abstract: Described is an apparatus comprising a first circuitry, a second circuitry, a first capacitor array, and a second capacitor array. The first circuitry may have an oscillator. The first capacitor array may have a set of first capacitors to tune the oscillator. The second capacitor array may have a second capacitor to tune the oscillator. A capacitance of the second capacitor may be greater than an average capacitance of the first capacitors. The second circuitry may be operable to synchronously activate the second capacitor and deactivate a number N of the first capacitors, and to synchronously deactivate the second capacitor and activate the N first capacitors, based on a predetermined sequence.Type: GrantFiled: December 27, 2019Date of Patent: March 9, 2021Assignee: Intel CorporationInventors: Mark Elzinga, Youngmin Park, Michael Bichan, Michael W. Altmann, Noam Familia, Vadim Levin, Dror Lazar
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Publication number: 20200234864Abstract: Described is a high Q-factor inductor. The inductor is formed as a unit cell coil, which is copied twice for a dual-coil inductor and copied four times for a quad-coil inductor. For each copy of the unit cell coil, the coil is rotated a subsequent substantially 90 degrees or substantially ?90 degrees. The rotation enables the terminals of the inductor to be routed equal-distant to a circuit that is placed in the line of symmetry between the two coils.Type: ApplicationFiled: January 19, 2019Publication date: July 23, 2020Applicant: Intel CorporationInventor: Mark Elzinga
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Patent number: 10581444Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.Type: GrantFiled: August 7, 2018Date of Patent: March 3, 2020Assignee: Intel CorporationInventors: Young Min Park, Mark Elzinga
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Publication number: 20180351565Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.Type: ApplicationFiled: August 7, 2018Publication date: December 6, 2018Applicant: Intel CorporationInventors: Young Min PARK, Mark ELZINGA
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Patent number: 10075175Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.Type: GrantFiled: March 20, 2017Date of Patent: September 11, 2018Assignee: Intel CorporationInventors: Young Min Park, Mark Elzinga
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Publication number: 20170257106Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.Type: ApplicationFiled: March 20, 2017Publication date: September 7, 2017Inventors: Young Min Park, Mark Elzinga
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Patent number: 9634826Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.Type: GrantFiled: November 30, 2015Date of Patent: April 25, 2017Assignee: Intel CorporationInventors: Young Min Park, Mark Elzinga
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Patent number: 9628094Abstract: Described is an integrated circuit (IC) with a phase locked loop with capability of fast locking. The IC comprises: a node to provide a reference clock; a digitally controlled oscillator (DCO) to generate an output clock; a divider coupled to the DCO, the divider to divide the output clock and to generate a feedback clock; and control logic operable to reset the DCO and the divider, and operable to release reset in synchronization with the reference clock. An apparatus for zeroing phase error is provided which comprises a first node to provide a reference clock; a second node to provide a feedback clock; a time-to-digital converter, coupled to the first and second nodes, to measure phase error between the reference and feedback clocks; a digital loop filter; and a control unit to adjust the measured phase error, and to provide the adjusted phase error to the digital loop filter.Type: GrantFiled: September 26, 2013Date of Patent: April 18, 2017Assignee: Intel CorporationInventors: Amr M. Lotfy, Mohamed A. Abdelsalam, Mamdouh O. Abd El-Mejeed, Nasser A. Kurd, Mohamed A. Abdelmoneum, Mark Elzinga, Young Min Park, Jagannadha R. Rapeta, Surya Musunuri
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Publication number: 20160204787Abstract: Described is an integrated circuit (IC) with a phase locked loop with capability of fast locking. The IC comprises: a node to provide a reference clock; a digitally controlled oscillator (DCO) to generate an output clock; a divider coupled to the DCO, the divider to divide the output clock and to generate a feedback clock; and control logic operable to reset the DCO and the divider, and operable to release reset in synchronization with the reference clock. An apparatus for zeroing phase error is provided which comprises a first node to provide a reference clock; a second node to provide a feedback clock; a time-to-digital converter, coupled to the first and second nodes, to measure phase error between the reference and feedback clocks; a digital loop filter; and a control unit to adjust the measured phase error, and to provide the adjusted phase error to the digital loop filter.Type: ApplicationFiled: September 26, 2013Publication date: July 14, 2016Inventors: Amr M. LOTFY, Mohamed A. ABDELSALAM, Mamdouh O. ABD EL-MEJEED, Nasser A. KURD, Mohamed A. ABDELMONEUM, Mark ELZINGA, Young Min PARK, Jagannadha R. RAPETA, Surya MUSUNURI
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Patent number: 6925620Abstract: Disclosed herein are swizzling techniques that may provide capacitive and inductive noise cancellation on a set of signal lines. Positive noise due to a capacitive coupling between attacker signal lines and near victim signal lines is, in part, cancelled by negative noise due to inductive coupling between the attacker signal lines and a far victim signal line. Swizzling patterns and repeatable swizzling patterns are computed to transpose near victim signal lines and far victim signal lines in subsequent segments to facilitate the capacitive and inductive cancellation. The signal lines are optionally reordered by computing a final swizzling to restore the set's original ordering.Type: GrantFiled: August 1, 2003Date of Patent: August 2, 2005Assignee: Intel CorporationInventor: Mark Elzinga
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Publication number: 20040093573Abstract: Disclosed herein are swizzling techniques that may provide capacitive and inductive noise cancellation on a set of signal lines. Positive noise due to a capacitive coupling between attacker signal lines and near victim signal lines is, in part, cancelled by negative noise due to inductive coupling between the attacker signal lines and a far victim signal line. Swizzling patterns and repeatable swizzling patterns are computed to transpose near victim signal lines and far victim signal lines in subsequent segments to facilitate the capacitive and inductive cancellation. The signal lines are optionally reordered by computing a final swizzling to restore the set's original ordering.Type: ApplicationFiled: August 1, 2003Publication date: May 13, 2004Inventor: Mark Elzinga
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Patent number: 6675365Abstract: A method and system for determination of the worst case switching vector, which greatly reduces the search space complexity. A single simulation is performed in the time-domain wherein the roles of the victim and attacker conductors are switched. In particular, the search space is reduced by virtue of the fact that certain combinations for the behavior attacker conductors are excluded. Only the phases of the attacker signals need to be determined.Type: GrantFiled: December 14, 2001Date of Patent: January 6, 2004Assignee: Intel CorporationInventor: Mark Elzinga