Abstract: The present disclosure relates to a concept for a transformer, a transmitter circuit, a semiconductor chip, a semiconductor package, a base station, a mobile device and a method for a radio frequency transmitter. The transformer for a radio frequency transmitter circuit comprises a primary coil and a secondary coils, which are configured to receive an input signal and to provide an output signal, and a ternary coil configured to provide a feedback signal.

Abstract: Vacuum cleaner, comprising a tube having a first diameter, a hose having a second diameter exceeding the first diameter by at least 15%, and a transition piece (T) having a first end (1) arranged for being connected to the tube, and a second end (2) arranged for being connected to the hose, wherein the transition piece (T) has a curved part that has a non-circular cross-section, the curved part having a first part (I) in which in a direction from the first end (1) to the second end (2), a first dimension (R1) of the cross-section increases to a diameter exceeding the first diameter by 15%, the first dimension (R1) being in a radial direction of the curved part, while a second dimension (R2) of the cross-section, perpendicular to the first dimension (R1), does not exceed the first diameter by more than 10%.

Abstract: A cyclone separation device includes a cyclone chamber for separating dirt from incoming air, a dirt collecting chamber arranged adjacent to the cyclone chamber for collecting dirt particles separated from air, and a dirt duct between the cyclone chamber and the dirt collecting chamber for allowing dirt particles to exit the cyclone chamber into the dirt collecting chamber. To reduce the generation of noise-generating air vortices, the dirt duct has an edge protruding into a direction at an angle to the dirt duct at an exit ridge of the cyclone chamber that is first encountered by the air rotating in the cyclone chamber. Preferably, the edge is formed by a tangential extension of a wall of the cyclone chamber. A vacuum cleaner advantageously includes such a cyclone separation device.

Abstract: Described is a high Q-factor inductor. The inductor is formed as a unit cell coil, which is copied twice for a dual-coil inductor and copied four times for a quad-coil inductor. For each copy of the unit cell coil, the coil is rotated a subsequent substantially 90 degrees or substantially ?90 degrees. The rotation enables the terminals of the inductor to be routed equal-distant to a circuit that is placed in the line of symmetry between the two coils.

Abstract: A cyclone separation device includes a cyclone chamber for separating dirt from incoming air, a dirt collecting chamber arranged adjacent to the cyclone chamber for collecting dirt particles separated from air, and a dirt duct between the cyclone chamber and the dirt collecting chamber for allowing dirt particles to exit the cyclone chamber into the dirt collecting chamber. To reduce the generation of noise-generating air vortices, the dirt duct has an edge protruding into a direction at an angle to the dirt duct at an exit ridge of the cyclone chamber that is first encountered by the air rotating in the cyclone chamber. Preferably, the edge is formed by a tangential extension of a wall of the cyclone chamber. A vacuum cleaner advantageously includes such a cyclone separation device.

Abstract: The present disclosure relates to a concept for a transformer, a transmitter circuit, a semiconductor chip, a semiconductor package, a base station, a mobile device and a method for a radio frequency transmitter. The transformer for a radio frequency transmitter circuit comprises a primary coil and a secondary coils, which are configured to receive an input signal and to provide an output signal, and a ternary coil configured to provide a feedback signal.

Abstract: An LED lamp includes a lamp base for insertion into a reflector of an automotive front lighting assembly; a panel extending from the lamp base with a first vertical side facing into one half of the reflector and a second vertical side facing into the other half of the reflector; a primary light source including a set of LED dies on each vertical side of the panel; a two-part shield including a first shield half shielding the LED dies on the first vertical side of the panel and a second shield half shielding the LED dies on the second vertical side of the panel. The two-part shield essentially has the form of a shield in a functionally equivalent filament lamp for providing a low beam. A lighting arrangement includes such an LED lamp; a reflector to receive the lamp; and an electrical interface for connecting to a controller.

Abstract: Vacuum cleaner, comprising a tube having a first diameter, a hose having a second diameter exceeding the first diameter by at least 15%, and a transition piece (T) having a first end (1) arranged for being connected to the tube, and a second end (2) arranged for being connected to the hose, wherein the transition piece (T) has a curved part that has a non- circular cross-section, the curved part having a first part (I) in which in a direction from the first end (1) to the second end (2), a first dimension (R1) of the cross-section increases to a diameter exceeding the first diameter by 15%, the first dimension (R1) being in a radial direction of the curved part, while a second dimension (R2) of the cross-section, perpendicular to the first dimension (R1), does not exceed the first diameter by more than 10%.

Abstract: Method and apparatus associated with clocking synchronization are disclosed herein. In various embodiment, a method for communication comprises: entering a clock training period, on successful performance of clock training handshake; entering a start static phase measurement (SSPM) sequence of clock training period, receiving a recovered clock; and processing the recovered clock to determine parts-per-million (PPM) differences, to be subsequently applied to compensate for the PPM differences determined during subsequent clocking synchronization. Linking training is performed after the subsequent clocking synchronization. In various embodiments, clocking synchronization comprises SSC synchronization. Other embodiments are also described and claimed.

Abstract: An LED lamp includes a lamp base for insertion into a reflector of an automotive front lighting assembly; a panel extending from the lamp base with a first vertical side facing into one half of the reflector and a second vertical side into the other half of the reflector; a primary light source including a set of LED dies on each vertical side of the panel; a two-part shield including a first shield half shielding the LED dies on the first vertical side of the panel and a second shield half shielding the LED dies on the second vertical side of the panel. The two-part shield essentially has the form of a shield in a functionally equivalent filament lamp for providing a low beam. A lighting arrangement includes such an LED lamp; a reflector to receive the lamp; and an electrical interface for connecting to a controller.

Abstract: Described is an apparatus comprising a first circuitry, a second circuitry, a first capacitor array, and a second capacitor array. The first circuitry may have an oscillator. The first capacitor array may have a set of first capacitors to tune the oscillator. The second capacitor array may have a second capacitor to tune the oscillator. A capacitance of the second capacitor may be greater than an average capacitance of the first capacitors. The second circuitry may be operable to synchronously activate the second capacitor and deactivate a number N of the first capacitors, and to synchronously deactivate the second capacitor and activate the N first capacitors, based on a predetermined sequence.

Abstract: Described is a high Q-factor inductor. The inductor is formed as a unit cell coil, which is copied twice for a dual-coil inductor and copied four times for a quad-coil inductor. For each copy of the unit cell coil, the coil is rotated a subsequent substantially 90 degrees or substantially ?90 degrees. The rotation enables the terminals of the inductor to be routed equal-distant to a circuit that is placed in the line of symmetry between the two coils.

Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.

Abstract: Method and apparatus associated with clocking synchronization are disclosed herein. In various embodiment, a method for communication comprises: entering a clock training period, on successful performance of clock training handshake; entering a start static phase measurement (SSPM) sequence of clock training period, receiving a recovered clock; and processing the recovered clock to determine parts-per-million (PPM) differences, to be subsequently applied to compensate for the PPM differences determined during subsequent clocking synchronization. Linking training is performed after the subsequent clocking synchronization. In various embodiments, clocking synchronization comprises SSC synchronization. Other embodiments are also described and claimed.

Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.

Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.

Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.

Abstract: Described is an apparatus which comprises: a time-to-digital converter (TDC) to receive a reference clock and a feedback clock, wherein the TDC is to generate a digital output code representing a time difference between the reference clock and the feedback clock; a circuitry to apply a digital code to an output of the TDC; and a node to receive the digital output code from the TDC and the digital code from the circuitry, wherein the circuitry is to monitor the digital output code and to control the TDC according to at least the monitored digital output code.

Abstract: Described is an integrated circuit (IC) with a phase locked loop with capability of fast locking. The IC comprises: a node to provide a reference clock; a digitally controlled oscillator (DCO) to generate an output clock; a divider coupled to the DCO, the divider to divide the output clock and to generate a feedback clock; and control logic operable to reset the DCO and the divider, and operable to release reset in synchronization with the reference clock. An apparatus for zeroing phase error is provided which comprises a first node to provide a reference clock; a second node to provide a feedback clock; a time-to-digital converter, coupled to the first and second nodes, to measure phase error between the reference and feedback clocks; a digital loop filter; and a control unit to adjust the measured phase error, and to provide the adjusted phase error to the digital loop filter.

Abstract: Described is an apparatus for over-clocking or under-clocking, the apparatus comprises: a locked loop (e.g., phase locked loop or frequency locked loop) having a feedback divider, the locked loop to receive a reference clock and to compare it with a feedback clock which is output from the feedback divider, and to generate an output clock; a post locked loop divider, coupled to the locked loop, to receive the output clock and to generate a base clock for other logic units; and a control logic to adjust first and second divider ratios for the feedback divider and the post locked loop divider respectively for over-clocking or under-clocking the base clock such that the locked loop remains locked while being over-clocked or under-clocked.