Patents by Inventor Mark Eriksson
Mark Eriksson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11133388Abstract: Semiconductor heterostructures, methods of making the heterostructures, and quantum dots and quantum computation devices based on the heterostructures are provided. The heterostructures include a quantum well of strained silicon seeded with a relatively low concentration of germanium impurities disposed between two quantum barriers of germanium or a silicon-germanium alloy. The quantum wells are characterized in that the germanium concentration in the wells has an oscillating profile that increases the valley splitting in the conduction band of the silicon quantum well.Type: GrantFiled: July 23, 2020Date of Patent: September 28, 2021Assignee: Wisconsin Alumni Research FoundationInventors: Robert J. Joynt, Mark G. Friesen, Mark A. Eriksson, Susan Nan Coppersmith, Donald E. Savage
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Patent number: 10572814Abstract: A quantum computing system and method for performing quantum computation is provided. In some aspects, the system includes at least one charge qubit comprising a quantum dot assembly prepared with a symmetric charge distribution, wherein the symmetric charge distribution is configured to reduce a coupling between the charge qubit and a charge noise source. The system also includes a controller for controlling the at least one charge qubit to perform a quantum computation. The system further includes an output for providing a report generated using information obtained from the quantum computation performed.Type: GrantFiled: January 15, 2016Date of Patent: February 25, 2020Assignee: Wisconsin Alumni Research FoundationInventors: Mark Friesen, Mark Eriksson, Susan Coppersmith
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Patent number: 9842921Abstract: A quantum semiconductor device is provided. The quantum semiconductor device includes a quantum heterostructure, a dielectric layer, and an electrode. The quantum heterostructure includes a quantum well layer that includes a first 2DEG region, a second 2DEG region, and a third 2DEG region. A first tunnel barrier exists between the first 2DEG region and the second 2DEG region. A second tunnel barrier exists between the second 2DEG region and the third 2DEG region. A third tunnel barrier exists either between the first 2DEG region and the third 2DEG region. The dielectric layer is formed on the quantum heterostructure. The electrode is formed on the dielectric layer directly above the first tunnel barrier.Type: GrantFiled: March 12, 2014Date of Patent: December 12, 2017Assignee: Wisconsin Alumni Research FoundationInventors: Mark A. Eriksson, John King Gamble, Daniel R. Ward, Susan Nan Coppersmith, Mark G. Friesen
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Publication number: 20170206461Abstract: A quantum computing system and method for performing quantum computation is provided. In some aspects, the system includes at least one charge qubit comprising a quantum dot assembly prepared with a symmetric charge distribution, wherein the symmetric charge distribution is configured to reduce a coupling between the charge qubit and a charge noise source. The system also includes a controller for controlling the at least one charge qubit to perform a quantum computation. The system further includes an output for providing a report generated using information obtained from the quantum computation performed.Type: ApplicationFiled: January 15, 2016Publication date: July 20, 2017Inventors: Mark Friesen, Mark Eriksson, Susan Coppersmith
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Publication number: 20150279981Abstract: A quantum semiconductor device is provided. The quantum semiconductor device includes a quantum heterostructure, a dielectric layer, and an electrode. The quantum heterostructure includes a quantum well layer that includes a first 2DEG region, a second 2DEG region, and a third 2DEG region. A first tunnel barrier exists between the first 2DEG region and the second 2DEG region. A second tunnel barrier exists between the second 2DEG region and the third 2DEG region. A third tunnel barrier exists either between the first 2DEG region and the third 2DEG region. The dielectric layer is formed on the quantum heterostructure. The electrode is formed on the dielectric layer directly above the first tunnel barrier.Type: ApplicationFiled: March 12, 2014Publication date: October 1, 2015Inventors: Mark A. Eriksson, John King Gamble, Daniel R. Ward, Susan Nan Coppersmith, Mark G. Friesen
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Patent number: 8089073Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.Type: GrantFiled: September 8, 2010Date of Patent: January 3, 2012Assignee: Wisconsin Alumni Research FoundationInventors: Paul G. Evans, Max G. Lagally, Zhenqiang Ma, Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson
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Publication number: 20100327355Abstract: This invention provides thin film devices that have been processed on their front- and backside. The devices include an active layer that is sufficiently thin to be mechanically flexible. Examples of the devices include back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.Type: ApplicationFiled: September 8, 2010Publication date: December 30, 2010Inventors: Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson, Paul G. Evans, Max G. Lagally, Zhenqiang Ma
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Patent number: 7812353Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.Type: GrantFiled: March 4, 2008Date of Patent: October 12, 2010Assignee: Wisconsin Alumni Research FoundationInventors: Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson, Paul G. Evans, Max G. Lagally, Zhenqiang Ma
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Patent number: 7776642Abstract: A quantum-well photoelectric device, such as a quantum cascade laser, is constructed of monocrystalline nanoscale membranes physically removed from a substrate and mechanically assembled into a stack.Type: GrantFiled: May 15, 2008Date of Patent: August 17, 2010Assignee: Wisconsin Alumni Research FoundationInventors: Mark A. Eriksson, Max G. Lagally, Arnold Melvin Kiefer
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Patent number: 7645933Abstract: Carbon nanotube Schottky barrier photovoltaic cells and methods and apparatus for making the cells are provided. The photovoltaic cells include at least one contact made from a first contact material, at least one contact made from a second contact material and a plurality of photoconducting carbon nanotubes bridging the contacts. A Schottky barrier is formed at the interface between the first contact material and the carbon nanotubes while at the interface between the second contact material and the carbon nanotubes, a Schottky barrier for the opposite carrier is formed, or a small, or no Schottky barrier is formed. It is the Schottky barrier asymmetry that allows the photo-excited electron-hole pairs to escape from the carbon nanotube device.Type: GrantFiled: March 2, 2005Date of Patent: January 12, 2010Assignee: Wisconsin Alumni Research FoundationInventors: Todd R. Narkis, Matt S. Marcus, Max G. Lagally, Mark A. Eriksson
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Publication number: 20090283749Abstract: A quantum-well photoelectric device, such as a quantum cascade laser, is constructed of monocrystalline nanoscale membranes physically removed from a substrate and mechanically assembled into a stack.Type: ApplicationFiled: May 15, 2008Publication date: November 19, 2009Inventors: Mark A. Eriksson, Max G. Lagally, Arnold Melvin Kiefer
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Publication number: 20080315253Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.Type: ApplicationFiled: March 4, 2008Publication date: December 25, 2008Inventors: Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson, Paul G. Evans, Max G. Lagally, Zhenqiang Ma
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Patent number: 7354809Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.Type: GrantFiled: February 13, 2006Date of Patent: April 8, 2008Assignee: Wisconsin Alumi Research FoundationInventors: Hao-Chih Yuan, Guogong Wang, Mark A. Eriksson, Paul G. Evans, Max G. Lagally, Zhenqiang Ma
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Publication number: 20070187719Abstract: This invention provides methods for fabricating thin film electronic devices with both front- and backside processing capabilities. Using these methods, high temperature processing steps may be carried out during both frontside and backside processing. The methods are well-suited for fabricating back-gate and double-gate field effect transistors, double-sided bipolar transistors and 3D integrated circuits.Type: ApplicationFiled: February 13, 2006Publication date: August 16, 2007Inventors: Hao-Chih Yuan, Guogong Wang, Mark Eriksson, Paul Evans, Max Lagally, Zhenqiang Ma
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Patent number: 7135697Abstract: A semiconductor quantum dot device converts spin information to charge information utilizing an elongated quantum dot having an asymmetric confining potential along its length so that charge movement occurs during orbital excitation. A single electron sensitive electrometer is utilized to detect the charge movement. Initialization and readout can be carried out rapidly utilizing RF fields at appropriate frequencies.Type: GrantFiled: February 25, 2004Date of Patent: November 14, 2006Assignee: Wisconsin Alumni Research FoundationInventors: Mark Gregory Friesen, Charles George Tahan, Robert James Joynt, Mark A. Eriksson
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Publication number: 20060196537Abstract: Carbon nanotube Schottky barrier photovoltaic cells and methods and apparatus for making the cells are provided. The photovoltaic cells include at least one contact made from a first contact material, at least one contact made from a second contact material and a plurality of photoconducting carbon nanotubes bridging the contacts. A Schottky barrier is formed at the interface between the first contact material and the carbon nanotubes while at the interface between the second contact material and the carbon nanotubes, a Schottky barrier for the opposite carrier is formed, or a small, or no Schottky barrier is formed. It is the Schottky barrier asymmetry that allows the photo-excited electron-hole pairs to escape from the carbon nanotube device.Type: ApplicationFiled: March 2, 2005Publication date: September 7, 2006Inventors: Todd Narkis, Matt Marcus, Max Lagally, Mark Eriksson
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Publication number: 20060027275Abstract: A block for a modular fluid block assembly is disclosed. The block includes first and second opposed faces and first and second apertures from the first face to the second face for receiving a fastener. Each aperture includes a first end and a second end and a head receiving cavity disposed adjacent the first end. The block further includes a fluidic passage passing from the first face to the second face and a pair of fastener receiver cavities in the first face. The block further includes a pair of head receiving cavities in the second face.Type: ApplicationFiled: October 3, 2005Publication date: February 9, 2006Inventors: Mark Eriksson, Jeffry Markulec, Dennis Rex
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Publication number: 20050184285Abstract: A semiconductor quantum dot device converts spin information to charge information utilizing an elongated quantum dot having an asymmetric confining potential along its length so that charge movement occurs during orbital excitation. A single electron sensitive electrometer is utilized to detect the charge movement. Initialization and readout can be carried out rapidly utilizing RF fields at appropriate frequencies.Type: ApplicationFiled: February 25, 2004Publication date: August 25, 2005Inventors: Mark Friesen, Charles Tahan, Robert Joynt, Mark Eriksson
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Patent number: 6597010Abstract: Semiconductor dot devices include a multiple layer semiconductor structure having a substrate, a back gate electrode layer, a quantum well layer, a tunnel barrier layer between the quantum well layer and the back gate, and a barrier layer above the quantum well layer. Multiple electrode gates are formed on the multi-layer semiconductor with the gates spaced from each other by a region beneath which quantum dots may be defined. Appropriate voltages applied to the electrodes allow the development and appropriate positioning of the quantum dots, allowing a large number of quantum dots be formed in a series with appropriate coupling between the dots.Type: GrantFiled: March 8, 2002Date of Patent: July 22, 2003Assignee: Wisconsin Alumni Research FoundationInventors: Mark A. Eriksson, Mark G. Friesen, Robert J. Joynt, Max G. Lagally, Daniel W. van der Weide, Paul Rugheimer, Donald E. Savage
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Publication number: 20020179897Abstract: Semiconductor dot devices include a multiple layer semiconductor structure having a substrate, a back gate electrode layer, a quantum well layer, a tunnel barrier layer between the quantum well layer and the back gate, and a barrier layer above the quantum well layer. Multiple electrode gates are formed on the multi-layer semiconductor with the gates spaced from each other by a region beneath which quantum dots may be defined. Appropriate voltages applied to the electrodes allow the development and appropriate positioning of the quantum dots, allowing a large number of quantum dots be formed in a series with appropriate coupling between the dots.Type: ApplicationFiled: March 8, 2002Publication date: December 5, 2002Inventors: Mark A. Eriksson, Mark G. Friesen, Robert J. Joynt, Max G. Lagally, Daniel W. van der Weide, Paul Rugheimer, Donald E. Savage