Abstract: A method to identify and/or assess structural integrity of a composite material, by distributing fiducial markers within the composite material during manufacture, and subsequently creating x-ray 3D tomosynthesis images of the composite material using an array of x-ray emitters and a digital x-ray detector, the 3D tomosynthesis images being used to determine the relative location of at least some of the fiducial markers. This enables detection of counterfeit products by comparison with recorded data at manufacture and detection of an internal degradation of the material indicated by movement of the fiducial markers. Relative locations of fiducial markers in a first set of images are compared with relative locations of fiducial markers in a second set of images, to identify common fiducial markers and thereby determine an offset therebetween. Both sets of images may be used to reconstruct a combined three-dimensional density function.

Abstract: An electrically powered eductor jet engine that utilizes plasma generation to provide jet propulsion. The jet engine may include at least one eductor shroud containing a positive plasma generator and a negative plasma generator. Additionally, shrouds of the eductor jet engine contain vortex compression tubes which house high voltage generator boost step-up inverter arc pulse generators. Furthermore, the system is powered by a power source such as an air powered electric generator such that the propellant supply, being air, provides power to the system as it is expelled.

Abstract: A prover chip uses a key multiplier value generated by a proof-of-work function from a challenge value, a random number, and elliptic curve cryptography (ECC) techniques to generate a one-time (or ephemeral) use private key. Similarly, a verifier chip uses the key multiplier value generated by an equivalent proof-of-work function, a public key received from the prover, and ECC techniques to derive a one-time use public key that corresponds to the ephemeral private key generated by the prover chip. The prover chip uses the ephemeral private key to sign the second challenge value and send this signed second challenge value to the verifier chip. The verifier verifies the value it receives using the one-time use public key and if the signature on the second challenge value is valid, authenticates the prover chip to a system.

Abstract: Techniques for characterizing performance of an application on a first system for subsequent adjustment of operating parameters when running the application on a second system. The techniques comprising running the application on the first system. The techniques further comprising determining from running the application on the first system, one or more performance metrics that must be met when the application is run on the second system for adjustment of operating parameters of the second system when running the application on the second system. The techniques further comprising running the application on the second system using the adjusted operating parameters.

Abstract: Ultrasonic energy is used for treating degenerative dementia. A focal point of an ultrasonic transducer beam is directed at a target area of the brain to promote removal of substances that accumulate in the interstitial pathways that are at least partially responsible for the degenerative dementia. In one example, the target area of the brain may comprise the hippocampus and the degenerative dementia may be Alzheimer's disease. The ultrasonic beam may stimulate brain tissue at a frequency that corresponds to a naturally occurring deep sleep burst frequency of neurons and subsequent astrocyte activation patterns that drive a convective process responsible for brain solute disposal. For example, the transducer may generate a burst frequency of between 1-4 hertz to stimulate deep sleep brain functions that help remove amyloid plaque.

Abstract: Techniques for providing secure cross-host memory sharing are described herein. A memory buffer device having processing circuitry is to receive a first request from a first initiator to share a region of memory associated with the memory buffer device with a second initiator. The processing circuitry may identify a first passcode associated with the first initiator. The processing circuitry may receive a second request from the second initiator to access the region of memory. The second request includes a second passcode. The processing circuitry may authenticate the second request using the first passcode and the second passcode. Responsive to authentication of the second request, the processing circuitry may generate a mapping between a host physical address space associated with the second initiator and a physical memory address space associated with the region of memory to enable the second initiator to access the region of memory.

Abstract: Aspects of the present disclosure involve a method and a system to perform a cryptographic operation that involves a number theoretic transformation of a first vector to a second vector by obtaining components of the first vector, performing a plurality of iterations that each include determining a plurality of output values, wherein each of the plurality of output values is a linear combination of two or more input values, the input values into a first iteration being the components of the first vector and the output values of the last iteration being representative of components of the second vector, and wherein one or more of the output values of at least one iteration are randomized by multiplying at least one input value by a random number, and determining, based on the output values of the last of the plurality of iterations, the components of the second vector.

Abstract: An x-ray imaging apparatus comprises a panel including individually energisable x-ray emitters, a detector and a processor, wherein the emitters and detector remain relatively stationary. The first set of x-ray emitters of the panel is energised to direct x-rays at the first object and surrounding area. The detector detects x-rays passing through the first object and surrounding area. Detected x-rays are processed to create a first x-ray image of the first object and surrounding area. A region of interest is selected from the first image which is smaller than the image of the first object and surrounding area. A second set of x-ray emitters of the panel is energised to direct x-rays at the region of interest. The detector detects x-rays passing through the region of interest. Detected x-rays are processed to create images of the region of interest to obtain tomosynthesis data showing structure of the region of interest.

Abstract: Methods and apparatus for reducing the risk of neurological injury to a human fetus during labor and before are disclosed, which include the steps of: (1) identifying during labor the risk of neurological injury to a fetus by, conducting an analysis of fetal blood to determine at least a first base excess (BE) value for the fetus; (2) determining a multiple of the median for the BE value at the first period in time, wherein a risk of neurological injury to the fetus is indicated when the BE value is a predefined multiple of a median BE value; and (3) treating the fetus for which the risk of neurological injury is, by intervening in labor to reduce or eliminate the risk of neurological injury to the fetus through any conventional therapeutic measures.

Abstract: A prediction system includes memory hardware configured to store instructions and processor hardware configured to execute the instructions stored by the memory hardware. The instructions include receiving a first set of inputs that indicate objectives, receiving a second set of inputs corresponding to a set of quantitative information, receiving a set of responses, generating a first prediction, and generating a set of actions. The instructions include, for each action, determining a respective parameter. Determining the respective parameter includes performing simulations to generate a set of outcomes and generating a comparison of the set of outcomes to the set of objectives. The instructions include, for each action, generating a respective score. Generating the respective score based is on a first score segment and a second score segment. The instructions include, generating a second prediction based on the set of objectives, the set of quantitative information, and a selected action.

Abstract: Techniques are described for selectively implementing power modes of computer games and home video consoles at various levels including low power mode operation.

Abstract: Processes for identification of binding sites on protein molecules such as epitopes are provided. The disclosed methods in some embodiments use a combination of protein sequence data, structural information, experimental data on binding affinity, and computational modeling in order to identify binding sites on protein molecules. Systems and computer readable media for implementing the disclosed methods are provided. Also provided are compositions comprising a binding site or antibody that interacts with the binding site as an active ingredient and methods of using such compositions.

Abstract: A method, system and computer readable medium for running a legacy application on a non-legacy device. Operating parameters of the non-legacy device when running the legacy application are set based on one or more pre-determined heuristics for adjustment of operating parameters of the newer system when running the legacy application on the non-legacy device from one or more performance metrics and other performance information.

Abstract: Scratchpad memory translation lookaside buffer techniques are described. In an implementation, the techniques described herein relate to a device including a memory management unit implemented in hardware of an integrated circuit to receive a mapping instruction from a mapping instruction source, the mapping instruction specifying a mapping between a virtual memory address and a physical memory address of a scratchpad memory and store a virtual-to-physical mapping entry in a translation lookaside buffer based on the mapping instruction.

Abstract: An X-ray imaging apparatus (110) for imaging helicopter rotor blades (20) attached to helicopters, the apparatus comprising an upper arm (140), a lower arm (150), and a connecting member (145) for maintaining the upper and lower arms stationary relative to one another, wherein one of the upper and lower arms includes at least one X-ray source (141), and wherein the other of the upper and lower arms includes a digital X-ray detector, the apparatus including movement means (160, 170) for moving the apparatus relative to the blade, in use, and a controller configured to control the X-ray source and X-ray detector, such that in use multiple 3-dimensional X-ray images of the blade are creatable.

Abstract: A surgical system for performing a capsulotomy of a lens capsule of an eye includes an elastic ring, a suction cup, an interface, a converter, and a control console. The elastic ring includes a conductive surface. The interface may be coupled to an air port and/or a fluid line of a phacomachine. The converter detects a pulse of air from the phacomachine via the interface, and produce an electrical signal in response. Fluid received from the phacomachine is delivered into the suction cup. The system is configured to remove the fluid from the suction cup and between the suction cup and a surface of the eye to form a suction seal. The control console is configured to, in response to receiving the electrical signal, drive a series of electrical pulses through the conductive surface of the elastic ring, causing the elastic ring to perform a tissue cutting operation.

Abstract: A graphics processing unit (GPU) includes one or more processor cores adapted to execute a software-implemented shader program, and one or more hardware-implemented ray tracing units (RTU) adapted to traverse an acceleration structure to calculate intersections of rays with bounding volumes and graphics primitives asynchronously with shader operation. The RTU implements traversal logic to traverse the acceleration structure including transformation of rays as needed to account for variations in coordinate space between levels, stack management, and other tasks to relieve burden on the shader, communicating intersections to the shader which then calculates whether the intersection hit a transparent or opaque portion of the object intersected. Thus, one or more processing cores within the GPU perform accelerated ray tracing by offloading aspects of processing to the RTU, which traverses the acceleration structure within which the 3D environment is represented.