Abstract: A graphics processing may include implementing a vertex shader and a pixel shader with a GPU. Vertex parameter values generated by the vertex shader may be stored in a memory. The pixel shader may access the vertex parameter values stored in the memory. Accessing the vertex parameter values may include disabling or bypassing hardware that performs interpolation on vertex parameter values. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: Within electrical test equipment systems comparator bridges are employed to provide the required dynamic range, accuracy, and flexibility. However, whilst bridge based measurement configurations remove many of the issues associated with making measurements at accuracies of sub-parts, a part, or few parts per million they still require, in many instances, that a null point be determined where the bridge is balanced. However, this becomes increasingly difficult within electrically noisy environments, with modern digital multimeters, and where the desired measurement point within the electrical system is physically difficult to access particularly when improved accuracy in calibration, standards, and measurements on circuits and components means measurement systems must operate at 50 parts per billion (ppb) and below.

Abstract: In one embodiment, the techniques herein provide a fully automated satellite-based backhaul system. In particular, a system in accordance with the techniques herein may utilize a satellite communication terminal to allow an Internet of Things (IoT) device (or any device) to be deployed in any location which has a line of sight towards a communication satellite. Specifically, the placement, orientation, and/or communication characteristics of the IoT device and/or satellite communication terminal (or antenna) may be manipulated (e.g., manual adjustment based on calculated directions and/or completely autonomously) to ensure avoidance of interference in any other wireless communication network.

Abstract: An anti-tamper layer is applied to a blank wafer. The layered wafer is then diced into shield dies. A shield die is oxide-to-oxide bonded to the top of an active die such that removing the shield die will damage the active die. The shield die may be sized and positioned such that wirebond pads along one or more edges of the active die remain exposed. The exposed wirebond pads may be used to electrically connect, via wirebonds, the active die to a substrate. A second shield die may be attached to the bottom of the active die to help protect against the use of bottom-to-top delayering.

Abstract: In graphics processing data is received representing one or more vertices for a scene in a virtual space. Primitive assembly is performed on the vertices to compute projections of the vertices from virtual space onto a viewport of the scene in a screen space of a display device containing a plurality of pixels, the plurality of pixels being subdivided into a plurality of subsections. Scan conversion determines which pixels of the plurality of pixels are part of each primitive that has been converted to screen space coordinates. Coarse rasterization for each primitive determines which subsection or subsections the primitive overlaps. Metadata associated with the subsection a primitive overlaps determines a pixel resolution for the subsection. The metadata is used in processing pixels for the subsection to generate final pixel values for the viewport of the scene that is displayed on the display device in such a way that parts of the scene in two different subsections have different pixel resolution.

Abstract: A drill bit includes a bit body and one or more cutters positioned on the bit body at select locations. At least one vibrational device is positioned on the bit body to impart vibration to the bit body and thereby mitigate stick-slip.

Abstract: In a computer graphics processing unit (GPU) having a texture unit, when pixel sample locations are based on a non-orthonormal grid in scene space, the texture unit receives texture space gradient values directly, e.g., from a shader unit or generates them from texture coordinates supplied, e.g., by a shader unit, and then applies a transformation to the gradient values configured to adjust the gradient values to those which would arise from the use of a orthonormal screen space grid.

Abstract: Resistor voltage dividers are commonly used to create reference voltages, or to reduce the magnitude of a voltage so it can be measured. Many measurements in test and measurement or calibration applications regularly require accuracies within the sub-part per million (ppm) range, e.g. 0.1 ppm to 1.0 ppm. However, the continued drive for improved accuracy in calibration, standards, and measurements on circuits and components means many measurements and measurement systems are operating at 50 parts per billion (ppb) and below to approximately 10 ppb. At these levels even relatively simple passive elements such as voltage dividers cannot be used without calibration and that these calibrations may be required at frequencies substantially higher than the other elements within the test and measurement equipment. Accordingly, the inventors have established a self-contained voltage divider with internal calibration allowing the voltage divider to be calibrated for every measurement if necessary.

Abstract: A cryptographic accelerator (processor) retrieves data blocks for processing from a memory. These data blocks arrive and are stored in an input buffer in the order they were stored in memory (or other known order)—typically sequentially according to memory address (i.e., in-order.) The processor waits until a certain number of data blocks are available in the input buffer and then randomly selects blocks from the input buffer for processing. This randomizes the processing order of the data blocks. The processing order of data blocks may be randomized within sets of data blocks associated with a single read transaction, or across sets of data blocks associated with multiple read transactions.

Abstract: A graphics processing may include implementing a vertex shader and a pixel shader with a GPU. Vertex parameter values may be compressed with the vertex shader and compressed vertex parameter values may be written to a cache. The pixel shader may access the compressed vertex parameter values that were written to the cache and decompress the compressed vertex parameter values. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A drill bit includes a bit body and one or more cutters positioned on the bit body at select locations. At least one vibrational device is positioned on the bit body to impart vibration to the bit body and thereby mitigate stick-slip.

Abstract: Graphics processing may include implementing a vertex shader and a pixel shader with the GPU. Vertex indices output from a vertex shader may be written to a cache. The vertex indices written to the cache may be accessed with the pixel shader and vertex parameter values associated with the vertex indices may be accessed from a memory unit with the pixel shader. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: In graphics processing data is received representing one or more vertices for a scene in a virtual space. Primitive assembly is performed on the vertices to compute projections of the vertices from virtual space onto a viewport of the scene in a screen space of a display device containing a plurality of pixels, the plurality of pixels being subdivided into a plurality of subsections. Scan conversion determines which pixels of the plurality of pixels are part of each primitive that has been converted to screen space coordinates. Coarse rasterization for each primitive determines which subsection or subsections the primitive overlaps. Metadata associated with the subsection a primitive overlaps determines a pixel resolution for the subsection. The metadata is used in processing pixels for the subsection to generate final pixel values for the viewport of the scene that is displayed on the display device in such a way that parts of the scene in two different subsections have different pixel resolution.

Abstract: In a computer graphics processing unit (GPU) having a texture unit, when pixel sample locations are based on a non-orthonormal grid in scene space, the texture unit receives texture space gradient values directly, e.g., from a shader unit or generates them from texture coordinates supplied, e.g., by a shader unit, and then applies a transformation to the gradient values configured to adjust the gradient values to those which would arise from the use of a orthonormal screen space grid.

Abstract: An application runs at a first operating frequency if the application is designed for a current version of a system and runs at a second operating frequency if the application is designed for a prior version of the system that operates at a lower frequency than the first operating frequency. The second operating frequency may be higher than the operating frequency of the prior version of the system to account for differences in latency, throughput or other processing characteristics between the two systems. Software readable cycle counters are based on a spoof clock running at the operating frequency of the prior version of the system, rather than the true operating frequency. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A disclosed example embodiment includes a drill bit used to form wellbores in subterranean formations. The drill bit includes a drill bit body for coupling to a lower end of a drill string. The drill bit body includes at least one support arm having an inwardly extending journal with a journal bearing having at least one radially reduced pocket extending at least partially circumferentially around the journal bearing including a load side of the journal bearing. At least one rotary cutter assembly is rotatably mounted to the journal. A plurality of cutting elements is disposed on the at least one rotary cutter assembly. At least two independent hardmetal pads are positioned within the at least one radially reduced pocket such that the hardmetal pads have a gap disposed therebetween.

Abstract: A spinal bone graft includes one or more cortical bone portions forming a first unit. The first unit includes an engagement surface for contacting bone, and a mating surface. The mating surface forms at least one first undercut. The bone graft also includes one or more cortical bone portions forming a second unit. The second unit includes an engagement surface for contacting bone, and a mating surface. The mating surface forms either at least one second undercut, or at least one connector. In the former, at least one connector is received in each of the first and second undercuts to interconnect the first and second units. In the latter, the at least one connector of the second unit is received in the first undercut of the first unit to interconnect the first unit and second unit.

Abstract: An application runs at a first operating frequency if the application is designed for a current version of a system and runs at a second operating frequency if the application is designed for a prior version of the system that operates at a lower frequency than the first operating frequency. The second operating frequency may be higher than the operating frequency of the prior version of the system to account for differences in latency, throughput or other processing characteristics between the two systems. Software readable cycle counters are based on a spoof clock running at the operating frequency of the prior version of the system, rather than the true operating frequency. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Abstract: A first entity may provide a request to transmit data from the first entity to a second entity. The first entity may receive a session key from the second entity in response to the request where the session key is encrypted by a second key that is based on a combination of a public key and a location associated with the second entity. A location associated with the first entity may be identified. Furthermore, a first key may be generated based on a combination of the location associated with the first entity and a private key that corresponds to the public key. The first key may decrypt data encrypted by the second key when the location associated with the first entity corresponds to the location associated with the second entity.

Abstract: In graphics processing data is received representing one or more vertices for a scene in a virtual space. Primitive assembly is performed on the vertices to compute projections of the vertices from virtual space onto a viewport of the scene in a screen space of a display device containing a plurality of pixels, the plurality of pixels being subdivided into a plurality of subsections. Scan conversion determines which pixels of the plurality of pixels are part of each primitive that has been converted to screen space coordinates. Coarse rasterization for each primitive determines which subsection or subsections the primitive overlaps. Metadata associated with the subsection a primitive overlaps determines a pixel resolution for the subsection. The metadata is used in processing pixels for the subsection to generate final pixel values for the viewport of the scene that is displayed on the display device in such a way that parts of the scene in two different subsections have different pixel resolution.