Abstract: An apparatus, such as a coherent optical receiver, includes a trans-impedance amplifier (TIA) and a low dropout (LDO) voltage regulator circuit for providing a supply voltage to the TIA. The LDO circuit is configured to adjust the supply voltage responsive to a DC voltage at an output of the TIA. In some implementations the LDO circuit may provide only a fraction of a supply current to the TIA, with another fraction provided by a partial current replica source.

Abstract: An apparatus, such as a coherent optical receiver, includes a transimpedance amplifier (TIA) with differential outputs, and a multi-tanh type current limiter connected across the differential outputs of the transimpedance amplifier. The multi-tanh type current limiter includes two tanh-type current limiters shifted in voltage and connected to subtract an output current thereof from an output current of the TIA.

Abstract: A transimpedance amplifier (TIA) includes a voltage amplifier and a first set of variable-resistors connected in parallel as a variable shunt feedback to the voltage amplifier. A control circuit is connected to control the variable resistors of the first set in a manner responsive to a TIA gain control voltage VGC. The control circuit includes a ramp generator and a reference set of variable-resistors connected in parallel. The ramp generator is configured to generate, responsive to an output voltage of the control circuit, a plurality of ramp voltages such that each of the voltages adjusts a corresponding one of the variable-resistors of the first set and of the reference set.

Abstract: An apparatus, e.g., an optical signal receiver, includes a trans-impedance amplifier (TIA) circuit. The TIA circuit includes a variable gain amplifier (VGA) having a tunable tail current source. The TIA circuit is configured to tune the tail current source to stabilize a DC current to a load resistor of the VGA over an operating gain range of the TIA circuit.

Abstract: An apparatus, such as a coherent optical receiver, includes a TIA, the TIA including a cascode circuit having a cascode node. A first tunable element is connected to tunably shunt the cascode node to vary a voltage gain of the TIA, e.g., up to a first amount. Implementations of the TIA further include another tunable element connected to vary a load of the cascode circuit to vary the voltage gain, e.g., up to a second amount. A current steering circuit may be provided to vary the voltage gain up to a third amount, each of the amounts being only a fraction of a target voltage gain variation of the TIA.

Abstract: Polarimetric transceiver front-ends and polarimetric phased array transceivers include two receive paths configured to receive signals from an antenna, each including a respective variable phase shifter. A first transmit path is connected to the variable phase shifter of one of the two receive paths and is configured to send signals to the antenna. A transmit/receive switch is configured to select between the first transmit path and the two receive paths for signals. The transmit/receive switch has an element that adds a high impedance to the transmit path when the transmit/receive switch is in a receiving state.

Abstract: Polarimetric transceiver front-ends and polarimetric phased array transceivers include two receive paths configured to receive signals from an antenna, each including a respective variable phase shifter. A first transmit path is connected to the variable phase shifter of one of the two receive paths and is configured to send signals to the antenna. A transmit/receive switch is configured to select between the first transmit path and the two receive paths for signals. The transmit/receive switch has an element that adds a high impedance to the transmit path when the transmit/receive switch is in a receiving state.

Abstract: A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.

Abstract: A capacitance of a digitally controlled circuit coupled to a first multiplexer (MUX) having a first switch coupled between a first input and a first output, a first pullup device coupled between VDD and the first output, and a first pulldown device coupled between the first output and VSS is controlled. For falling slope of the first output, in a first phase, which is before the falling slope of the first output, turning ON the first switch, and turning OFF the first pullup device. In a second phase, which is during the falling slope of the first output, the first input is coupled to an output of a digital to analog converter coupled to the MUX. In a third phase, which is after the falling slope of the first output, the first switch is turned OFF and the first pulldown device is turned ON.

Abstract: A polarimetric transceiver front-end includes two receive paths configured to receive signals from an antenna, each receive path corresponding to a respective polarization. Each front-end includes a variable amplifier and a variable phase shifter; a first transmit path configured to send signals to the antenna, where the transmit path is connected to the variable phase shifter of one of the two receive paths and includes a variable amplifier; and a transmit/receive switch configured to select between the first transmit path and the two receive paths for signals, where the transmit/receive switch includes a quarter-wavelength transmission line that adds a high impedance to the transmit path when the transmit/receive switch is in a receiving state.

Abstract: An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

Abstract: A method and system are disclosed for measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL). In one embodiment, the method comprises introducing multiple phase errors in the PLL, measuring a specified aspect of the introduced phase errors, and determining a value for the specified parameter using the measured aspects of the introduced phase errors. In one embodiment, the phase errors are introduced repetitively in the PLL, and these phase errors produce a modified phase difference between the reference signal and the feedback signal in the PPL. In one embodiment, crossover times, when this modified phase difference crosses over a preset value, are determined, and these crossover times are used to determine the value for the specified parameter. In an embodiment, the parameter is calculated as a mathematical function of the crossover times. The parameter may be, for example, the bandwidth of the PLL.

Abstract: An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

Abstract: An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

Abstract: An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

Abstract: An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

Abstract: An integrated electronic circuit is provided. The integrated electronic circuit includes a transconductance cell formed from transconductance cell devices. The integrated electronic circuit further includes active and passive decoupling circuits. The integrated electronic circuit also includes an oscillator having a tank that is direct current decoupled from the transconductance cell devices using the active and passive decoupling circuits to increase voltage swing and decrease phase noise of the oscillator.

Abstract: Methods and systems for phase correction include determining a phase error direction and generating a prediction for the phase error based on a sigma-delta error. It is determined whether the prediction agrees with the determined phase error direction. If the prediction does not agree, a phase correction is adjusted in accordance with the predicted phase error.

Abstract: Methods and systems for phase correction include determining a phase error direction and generating a prediction for the phase error based on a sigma-delta error. It is determined whether the prediction agrees with the determined phase error direction. If the prediction does not agree, a phase correction is adjusted in accordance with the predicted phase error.

Abstract: A method and system are disclosed for measuring a specified parameter in a phase-locked loop frequency synthesizer (PLL). In one embodiment, the method comprises introducing multiple phase errors in the PLL, measuring a specified aspect of the introduced phase errors, and determining a value for the specified parameter using the measured aspects of the introduced phase errors. In one embodiment, the phase errors are introduced repetitively in the PLL, and these phase errors produce a modified phase difference between the reference signal and the feedback signal in the PPL. In one embodiment, crossover times, when this modified phase difference crosses over a preset value, are determined, and these crossover times are used to determine the value for the specified parameter. In an embodiment, the parameter is calculated as a mathematical function of the crossover times. The parameter may be, for example, the bandwidth of the PLL.