Patents by Inventor Mark G. Megerian

Mark G. Megerian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Dynamically reassigning a connected node to a block of compute nodes for re-launching a failed job
    Patent number: 8140889
    Abstract: Methods, systems, and products for dynamically reassigning a connected node to a block of compute nodes for re-launching a failed job that include: identifying that a job failed to execute on the block of compute nodes because connectivity failed between a compute node assigned as at least one of the connected nodes for the block of compute nodes and its supporting I/O node; and re-launching the job, including selecting an alternative connected node that is actively coupled for data communications with an active I/O node; and assigning the alternative connected node as the connected node for the block of compute nodes running the re-launched job.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: March 20, 2012
    Assignee: International Business Machines Corporation
    Inventors: Thomas A. Budnik, Brant L. Knudson, Mark G. Megerian, Samuel J. Miller, William M. Stockdell
  • DYNAMICALLY REASSIGNING A CONNECTED NODE TO A BLOCK OF COMPUTE NODES FOR RE-LAUNCHING A FAILED JOB
    Publication number: 20120047393
    Abstract: Methods, systems, and products for dynamically reassigning a connected node to a block of compute nodes for re-launching a failed job that include: identifying that a job failed to execute on the block of compute nodes because connectivity failed between a compute node assigned as at least one of the connected nodes for the block of compute nodes and its supporting I/O node; and re-launching the job, including selecting an alternative connected node that is actively coupled for data communications with an active I/O node; and assigning the alternative connected node as the connected node for the block of compute nodes running the re-launched job.
    Type: Application
    Filed: August 23, 2010
    Publication date: February 23, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Thomas A. Budnik, Brant L. Knudson, Mark G. Megerian, Samuel J. Miller, William M. Stockdell
  • MULTI-PETASCALE HIGHLY EFFICIENT PARALLEL SUPERCOMPUTER
    Publication number: 20110219208
    Abstract: A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaOPS-scale computing, at decreased cost, power and footprint, and that allows for a maximum packaging density of processing nodes from an interconnect point of view. The Supercomputer exploits technological advances in VLSI that enables a computing model where many processors can be integrated into a single Application Specific Integrated Circuit (ASIC).
    Type: Application
    Filed: January 10, 2011
    Publication date: September 8, 2011
    Applicant: International Business Machines Corporation
    Inventors: Sameh Asaad, Ralph E. Bellofatto, Michael A. Blocksome, Matthias A. Blumrich, Peter Boyle, Jose R. Brunheroto, Dong Chen, Chen-Yong Cher, George L. Chiu, Norman Christ, Paul W. Coteus, Kristan D. Davis, Gabor J. Dozsa, Alexandre E. Eichenberger, Noel A. Eisley, Matthew R. Ellavsky, Kahn C. Evans, Bruce M. Fleischer, Thomas W. Fox, Alan Gara, Mark E. Giampapa, Thomas M. Gooding, Michael K. Gschwind, John A. Gunnels, Shawn A. Hall, Rudolf A. Haring, Philip Heidelberger, Todd A. Inglett, Brant L. Knudson, Gerard V. Kopcsay, Sameer Kumar, Amith R. Mamidala, James A. Marcella, Mark G. Megerian, Douglas R. Miller, Samuel J. Miller, Adam J. Muff, Michael B. Mundy, John K. O'Brien, Kathryn M. O'Brien, Martin Ohmacht, Jeffrey J. Parker, Ruth J. Poole, Joseph D. Ratterman, Valentina Salapura, David L. Satterfield, Robert M. Senger, Brian Smith, Burkhard Steinmacher-Burow, William M. Stockdell, Craig B. Stunkel, Krishnan Sugavanam, Yutaka Sugawara, Todd E. Takken, Barry M. Trager, James L. Van Oosten, Charles D. Wait, Robert E. Walkup, Alfred T. Watson, Robert W. Wisniewski, Peng Wu
  • Power throttling of collections of computing elements
    Patent number: 8001401
    Abstract: An apparatus and method for controlling power usage in a computer includes a plurality of computers communicating with a local control device, and a power source supplying power to the local control device and the computer. A plurality of sensors communicate with the computer for ascertaining power usage of the computer, and a system control device communicates with the computer for controlling power usage of the computer.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: August 16, 2011
    Assignee: International Business Machines Corporation
    Inventors: Ralph E. Bellofatto, Paul W. Coteus, Paul G. Crumley, Alan G. Gara, Mark E. Giampapa, Thomas M. Gooding, Rudolf A. Haring, Mark G. Megerian, Martin Ohmacht, Don D. Reed, Richard A. Swetz, Todd Takken
  • Link failure detection in a parallel computer
    Patent number: 7831866
    Abstract: Methods, apparatus, and products are disclosed for link failure detection in a parallel computer including compute nodes connected in a rectangular mesh network, each pair of adjacent compute nodes in the rectangular mesh network connected together using a pair of links, that includes: assigning each compute node to either a first group or a second group such that adjacent compute nodes in the rectangular mesh network are assigned to different groups; sending, by each of the compute nodes assigned to the first group, a first test message to each adjacent compute node assigned to the second group; determining, by each of the compute nodes assigned to the second group, whether the first test message was received from each adjacent compute node assigned to the first group; and notifying a user, by each of the compute nodes assigned to the second group, whether the first test message was received.
    Type: Grant
    Filed: August 2, 2007
    Date of Patent: November 9, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Michael A. Blocksome, Mark G. Megerian, Brian E. Smith
  • Computer hardware fault administration
    Patent number: 7796527
    Abstract: Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Mark G. Megerian, Joseph D. Ratterman, Brian E. Smith
  • QUERY INTERFACE CONFIGURED TO INVOKE AN ANALYSIS ROUTINE ON A PARALLEL COMPUTING SYSTEM AS PART OF DATABASE QUERY PROCESSING
    Publication number: 20100094893
    Abstract: Techniques are disclosed for invoking an analysis routine running on a parallel computer system to analyze query results. An interface used to build and execute a database query may be used to invoke a complex analysis routine on a parallel computer system to analyze query results obtained by executing the database query. Alternatively, a user may build a query that includes specific conditions evaluated by an analysis routine on the parallel computer system (as opposed to selecting an analysis routine after receiving query results).
    Type: Application
    Filed: October 9, 2008
    Publication date: April 15, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard D. Dettinger, Mark G. Megerian, Amanda Peters
  • Program Invocation From A Query Interface to Parallel Computing System
    Publication number: 20100094894
    Abstract: Techniques are disclosed for invoking an analysis routine running on a parallel computer system to analyze query results. An interface used to build and execute a database query may be used to invoke a complex analysis routine on a parallel computer system to analyze query results obtained by executing the database query. Alternatively, a user may build a query that includes specific conditions evaluated by an analysis routine on the parallel computer system (as opposed to selecting an analysis routine after receiving query results).
    Type: Application
    Filed: October 9, 2008
    Publication date: April 15, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard D. Dettinger, Mark G. Megerian, Amanda Peters
  • Locating hardware faults in a parallel computer
    Patent number: 7697443
    Abstract: Locating hardware faults in a parallel computer, including defining within a tree network of the parallel computer two or more sets of non-overlapping test levels of compute nodes of the network that together include all the data communications links of the network, each non-overlapping test level comprising two or more adjacent tiers of the tree; defining test cells within each non-overlapping test level, each test cell comprising a subtree of the tree including a subtree root compute node and all descendant compute nodes of the subtree root compute node within a non-overlapping test level; performing, separately on each set of non-overlapping test levels, an uplink test on all test cells in a set of non-overlapping test levels; and performing, separately from the uplink tests and separately on each set of non-overlapping test levels, a downlink test on all test cells in a set of non-overlapping test levels.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: April 13, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Mark G. Megerian, Joseph D. Ratterman, Brian E. Smith
  • Locating hardware faults in a data communications network of a parallel computer
    Patent number: 7646721
    Abstract: Hardware faults location in a data communications network of a parallel computer. Such a parallel computer includes a plurality of compute nodes and a data communications network that couples the compute nodes for data communications and organizes the compute node as a tree. Locating hardware faults includes identifying a next compute node as a parent node and a root of a parent test tree, identifying for each child compute node of the parent node a child test tree having the child compute node as root, running a same test suite on the parent test tree and each child test tree, and identifying the parent compute node as having a defective link connected from the parent compute node to a child compute node if the test suite fails on the parent test tree and succeeds on all the child test trees.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Charles J. Archer, Mark G. Megerian, Joseph D. Ratterman, Brian E. Smith
  • Scaling and Managing Work Requests on a Massively Parallel Machine
    Publication number: 20090288085
    Abstract: A method, computer program product and computer system for scaling and managing requests on a massively parallel machine, such as one running in MIMD mode on a SIMD machine. A submit mux (multiplexer) is used to federate work requests and to forward the requests to the management node. A resource arbiter receives and manges these work requests. A MIMD job controller works with the resource arbiter to manage the work requests on the SIMD partition. The SIMD partition may utilize a mux of its own to federate the work requests and the computer nodes. Instructions are also provided to control and monitor the work requests.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 19, 2009
    Inventors: Paul V. Allen, Thomas A. Budnik, Mark G. Megerian, Samuel J. Miller
  • Resource Management on a Computer System Utilizing Hardware and Environmental Factors
    Publication number: 20090288094
    Abstract: A method for resource management on a computer system utilizing hardware and environmental information. A caller interacts with an application program interface to handle information requests with a persistent data storage device to combine information involving hardware resource information, environmental data and other system information, all both historical, present and predicted values. Application execution decisions may then made regarding hardware for the calling entity. The method may be implemented as a computer process.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 19, 2009
    Inventors: Paul V. Allen, Thomas A. Budnik, Mark G. Megerian, Samuel J. Miller
  • Configurable Persistent Storage on a Computer System Using a Database
    Publication number: 20090287712
    Abstract: A method for persistent data storage on a computer system with a kernel by retrieving configuration information regarding a system operation request and then deciding based on the configuration information whether to execute it with special persistent storage or to not do so. The configuration information may be stored on a central node or may be encoded onto any of the nodes. The special persistent storage may be a database. The method may further be implemented by a computer program product. It also may be implemented on a computer system.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 19, 2009
    Inventors: Mark G. Megerian, Andrew T. Tauferner
  • Link Failure Detection in a Parallel Computer
    Publication number: 20090037773
    Abstract: Methods, apparatus, and products are disclosed for link failure detection in a parallel computer including compute nodes connected in a rectangular mesh network, each pair of adjacent compute nodes in the rectangular mesh network connected together using a pair of links, that includes: assigning each compute node to either a first group or a second group such that adjacent compute nodes in the rectangular mesh network are assigned to different groups; sending, by each of the compute nodes assigned to the first group, a first test message to each adjacent compute node assigned to the second group; determining, by each of the compute nodes assigned to the second group, whether the first test message was received from each adjacent compute node assigned to the first group; and notifying a user, by each of the compute nodes assigned to the second group, whether the first test message was received.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 5, 2009
    Inventors: Charles J. Archer, Michael A. Blocksome, Mark G. Megerian, Brian E. Smith
  • POWER THROTTLING OF COLLECTIONS OF COMPUTING ELEMENTS
    Publication number: 20090006873
    Abstract: An apparatus and method for controlling power usage in a computer includes a plurality of computers communicating with a local control device, and a power source supplying power to the local control device and the computer. A plurality of sensors communicate with the computer for ascertaining power usage of the computer, and a system control device communicates with the computer for controlling power usage of the computer.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 1, 2009
    Applicant: International Business Machines Corporation
    Inventors: Ralph E. Bellofatto, Paul W. Coteus, Paul G. Crumley, Alan G. Gara, Mark E. Giampapa, Thomas M. Gooding, Rudolf Haring, Mark G. Megerian, Martin Ohmacht, Don D. Reed, Richard A. Swetz, Todd Takken
  • Validating a Cabling Topology in a Distributed Computing System
    Publication number: 20080259816
    Abstract: Validating a cabling topology in a distributed computing system comprised of cabled nodes connected using data communications cables, each cabled node characterized by cabling dimensions, each cable corresponding to one of the cabling dimensions, includes: receiving a selection from a user of at least one cabled node for topology validation; identifying, for each cabling dimension for each selected cabled node, a shortest cabling path; determining, for each cabling dimension, whether the number of cabled nodes in the shortest cabling path for each selected cabled node match; and if, for each cabling dimension, the number of cabled nodes in the shortest cabling path for each selected cabled node match: selecting, for each cabling dimension, the number of cabled nodes in the shortest cabling path as a representative value for the cabling dimension, calculating a product of the representative values, and determining whether the product equals the number of selected cabled nodes.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 23, 2008
    Inventors: Charles J. Archer, Mark G. Megerian
  • Managing Data Retention in a Database Operated by a Database Management System
    Publication number: 20070294308
    Abstract: Methods, apparatus, and computer program products are disclosed for managing data retention in a database operated by a database management system (‘DBMS’) that include creating, in metadata of the database, a retention policy for data of the database, and enforcing the retention policy by the DBMS. Managing data retention in a database operated by a DBMS may also include adding to the command set a retention command capable of creating the retention policy for data of the database, and creating the retention policy by the retention command. Managing data retention in a database operated by a DBMS may also include adding the retention measurement column to a table of the database. Managing data retention in a database operated by a DBMS may also include periodically enforcing the retention policy according to the retention periods.
    Type: Application
    Filed: June 12, 2006
    Publication date: December 20, 2007
    Inventor: Mark G. Megerian